Abstract: A hybrid solid-state electrical switch comprising a plunger, a switch actuation sensor configured to (i) determine actuation or non-actuation of the plunger and (ii) generate one or more actuation signals based on the determined actuation or non-actuation, one or more input/output terminals, and a switching circuit that is configured to perform switching operations on the one or more input/output terminals based on the one or more actuation signals.

Abstract: The present disclosure relates to a method for reducing photoresist and carbon etch rates in a process chamber using a silicon-based chamber pre-coat. The method includes forming, in-situ the process chamber, a coating layer on a surface of a lid assembly of the process chamber, the coating layer comprising a silicon-containing material, and etching a target layer disposed on a substrate through a mask layer having a carbon-containing material, while the substrate is disposed on an electrostatic chuck below the coating layer of the lid assembly.

Abstract: A method includes obtaining a substrate, and etching a portion of the substrate using an etch process performed at a temperature of less than or equal to about zero degrees Celsius. Etching the portion of the substrate includes forming an etchant on the substrate using vapor adsorption.

Abstract: An apparatus for generating plasma inductively in a process chamber leverages a radial coil network. In some embodiments, the radial coil network is a planar structure comprising an inner conductor with an open center where at least one RF power source is electrically connected to the inner conductor at a power node, an outer conductor spaced away from and surrounding the inner conductor where at least one ground is electrically connected to the outer conductor at a ground node, a plurality of branch conductors extending from the inner conductor to the outer conductor where the plurality of branch conductors is distributed uniformly in the radial coil network, and a plurality of capacitors where at least one capacitor of the plurality of capacitors is electrically interposed into each branch conductor of the plurality of branch conductors.

Abstract: A method of processing a substrate that includes: loading the substrate in a plasma processing chamber, the substrate including an underlying layer; maintaining a steady state flow of a process gas into the plasma processing chamber in the plasma processing chamber; generating a plasma in the plasma processing chamber; exposing the substrate to the plasma to etch the underlying layer; and pulsing a first additional gas, using a first effusive gas injector, towards a first region of the substrate to disrupt the steady state flow of the process gas over the first region, the pulsing locally changing a composition of the plasma near the first region.

Abstract: A plasma processing apparatus includes a plasma processing chamber, a source power (SP) control path configured to generate a plasma in the processing chamber by generating SP pulses according to SP pulse parameters, and a timing circuit coupled to the SP control path. The timing circuit is configured to generate a delay causing a nonzero offset duration separating trailing edges of the SP pulses and leading edges of bias power (BP) pulses, and to output a trigger signal immediately following the nonzero offset duration. The plasma processing apparatus further includes a BP control path coupled to the timing circuit and configured to generate BP pulses triggered by the trigger signal and to couple the BP pulses to a substrate disposed in the processing chamber. The BP pulses are generated according to BP pulse parameters that are separate from the SP pulse parameters.

Abstract: A method for manufacturing a FET semiconductor structure includes providing a substrate comprising at least one source/drain contact of at least one FET, the at least one source/drain contact formed adjacent to a dummy gate of the at least one FET. A TiSi2 film with C54 structure is selectively deposited directly on and fully covering the at least one source/drain contact relative to a vertical sidewall of a gate spacer between the at least one source/drain contact and the dummy gate. The dummy gate is replaced with a replacement metal gate.

Abstract: Methods of semiconductor processing may include forming plasma effluents. The plasma effluents may then contact a carbon-containing hardmask and an oxide cap. The plasma effluents can etch one or more features in the oxide cap through one or more apertures of the carbon-containing hardmask. Etching can create a tapered profile for one or more features in the oxide cap. The one or more features can be characterized by a critical dimension at the bottom of the one or more features. The critical dimension can be less than or about 80% of a width of the one or more apertures.

Abstract: Methods of semiconductor processing may include forming plasma effluents of a hydrogen-and-fluorine-containing precursor. The plasma effluents may then contact a silicon-containing hardmask material and a photoresist material. The silicon-containing hardmask material can overlay an organic material overlaying a substrate in a processing region of a semiconductor processing chamber. Etching the silicon-containing hardmask material with the plasma effluents while the photoresist material with the plasma effluents. The silicon-containing hardmask material can be etched at a selectivity greater than or about 10 relative to the photoresist material. A temperature in the processing region can be maintained at about ?20° C. or less.

Abstract: In one exemplary embodiment described herein are innovative plasma processing methods and system that utilize direct measurement of direct current (DC) field or self-bias voltage (Vdc) in a plasma processing chamber. In one embodiment, a non-plasma contact measurement using the electric field effect from Vdc is provided. The Vdc sensing method may be robust to a variety of process conditions. In one embodiment, the sensor is integrated with any focus ring material (for example, quartz or doped-undoped silicon). Robust extraction of the Vdc measurement signal may be used for process control. In one embodiment, the sensor may be integrated, at least in part, with the substrate being processed in the chamber.

Abstract: Exemplary semiconductor processing methods may include a substrate housed in the processing region. A layer of silicon-containing material may be disposed on the substrate, a patterned resist material may be disposed on the layer of silicon-containing material, and a layer of carbon-containing material may be disposed on the patterned resist material and the layer of silicon-containing material. The methods may include providing a hydrogen-containing precursor, a nitrogen-containing precursor, or both to a processing region of a semiconductor processing chamber, forming plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor, and contacting the substrate with the plasma effluents of the hydrogen-containing precursor and/or the nitrogen-containing precursor. The contacting may remove a portion of the layer of carbon-containing material.

Abstract: Methods of semiconductor processing may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. A feature may extend through one or more layers of material disposed on the substrate. The methods may include forming plasma effluents of the silicon-containing precursor and the oxygen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor. The contacting may form a silicon-and-oxygen-containing material on at least a bottom portion of the feature. A temperature in the processing region may be maintained at less than or about 0° C.

Abstract: A plasma processing system includes a remote source chamber, a plenum chamber, a plasma process chamber, and a substrate holder disposed within the plasma process chamber. The remote source chamber is configured to contain a remote plasma generated from a first gas within the remote source chamber. The remote plasma includes radicals. The plenum chamber is includes a radical ballast region bounded by a bottom wall and sidewalls. The plenum chamber is configured to receive the radicals from the remote source chamber. The plasma process chamber is configured to receive the radicals through the sidewalls of the plenum chamber as well as to contain a process plasma generated from a second gas within the plasma process chamber. The substrate holder is configured to support a substrate to be processed using the process plasma in the presence of the radicals.

Abstract: Systems and methods for detecting a presence of a tracked device (e.g., a device of a guest, an employee, and/or a device coupled to an object), identifying the tracked device (e.g., as being associated with the guest, the employee, and/or the object), and determining a location of the tracked device (e.g., within a venue) can include a plurality of devices and one or more servers. The systems a plurality of communication modules configured to form a network of physical reference points in at least a portion of a venue. The plurality of communication modules can communicate with one or more servers, and the one or more servers can identify and determine a location of the tracked device based on data received in response to presence data being detected. The one or more servers and/or each device can perform various methods associated with presence detection, identification, and location determination.

Abstract: Methods are provided herein for patterning extreme ultraviolet (EUV) (or lower wavelength) photoresists, such metal-oxide photoresists. A patterning layer comprising a metal-oxide photoresist is provided on one or more underlying layers provided on a substrate, and portions of the patterning layer not covered by a mask overlying the patterning layer are exposed to EUV or lower wavelengths light. A cyclic dry process is subsequently performed to remove portions of the patterning layer defined by the EUV or lower wavelength light and develop the metal-oxide photoresist pattern.

Abstract: Exemplary semiconductor processing methods may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of a silicon-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor. The contacting may etch a feature in the layer of silicon-containing material. A substrate support pedestal temperature may be maintained at less than or about ?20° C. during the semiconductor processing method.

Abstract: A plasma processing system includes a vacuum chamber, a first coupling electrode, a substrate holder disposed in the vacuum chamber, a second coupling electrode, and a controller. The substrate holder is configured to support a substrate. The first coupling electrode is configured to provide power for generation of a plasma in the vacuum chamber. The first coupling electrode is further configured to couple source power pulses to the plasma. The second coupling electrode is configured to couple bias power pulses to the substrate. The controller is configured to control a first offset duration between the source power pulses the bias power pulses.

Abstract: A method of processing a substrate that includes: flowing a gas including a fluorocarbon to a plasma processing chamber; sustaining a plasma generated from the gas; depositing a carbonaceous layer over the substrate by exposing the substrate to the plasma, the substrate having a recess having an aspect ratio between 10:1 and 100:1, the depositing including a pulsed plasma process including: during a first time duration, setting a source power (SP) at a first SP level and a bias power (BP) at a first BP level, where the plasma includes fluorocarbon ions polymerizing on a bottom surface to form the carbonaceous layer, and during a second time duration, setting the SP at a second SP level higher than the first SP level and the BP at a second BP level lower than the first BP level, where the plasma includes fluorine radicals trimming the carbonaceous layer.

Abstract: A plasma processing method includes generating a plasma within a processing chamber using source power to ignite a glow phase of the plasma, generating low-energy ions at a substrate supported by a substrate holder in the processing chamber from the plasma using lower-frequency radio frequency bias power applied during the glow phase, and generating high-energy ions at the substrate using higher-frequency radio frequency bias power applied during an afterglow phase of the plasma. The frequency of the higher-frequency radio frequency bias power is greater than the frequency of the lower-frequency radio frequency bias power.

Abstract: A method for processing a substrate includes forming a patterned layer over the substrate, the layer including an opening, where a surface of the opening includes a sidewall and a bottom wall. The method includes processing the patterned layer with an anisotropic process by generating a flux of gas clusters over the substrate in a first process chamber, where the gas clusters include radical precursors; exposing the substrate to the flux of gas clusters. The method includes sustaining plasma including ions in a second process chamber; and exposing the substrate to the ions by directing the ions toward the bottom wall of the opening.