Abstract: Systems and methods for uplock systems are provided. An uplock system may comprise a body, a hook having an opening defining at least a first surface and a second surface, the hook being rotationally engaged with the body, a first biasing member configured to bias the hook in a first rotational direction relative to the body, and a cam in operable communication with the hook and the body such that the hook has at least a first stable position and a second stable position relative to the body when biased in the first rotational direction.

Abstract: In one embodiment, a graphics processing unit 170 may support a logical resource using a physical tile pool 350 for sparse data sets. The graphics processing unit 170 may allocate a physical memory allocation into a primary physical tile pool 350. The graphics processing unit 170 may define a mapping for a logical tile set 300 for a logical resource. The graphics processing unit 170 may selectively map a primary logical tile 320 of the logical tile set 300 to a primary physical tile 360 of the primary physical tile pool 350.

Abstract: Systems and methods for uplock systems are provided. An uplock system may comprise a body, a hook having an opening defining at least a first surface and a second surface, the hook being rotationally engaged with the body, a first biasing member configured to bias the hook in a first rotational direction relative to the body, and a cam in operable communication with the hook and the body such that the hook has at least a first stable position and a second stable position relative to the body when biased in the first rotational direction.

Abstract: A windshield wiper assembly for a dual sweep angle and indexable wiper system is provided. The system includes a wiper motor and a wiper arm for sweeping a surface of a windshield coupled to a first eccentric, the first eccentric comprising a primary eccentric and an indexable eccentric plate, wherein the indexable eccentric plate determines an eccentric offset of the wiper arm coupled to the first eccentric. The system further includes an output wiper shaft coupled to the wiper arm, a second eccentric coupled to a cam shaft, and a link coupled to the first eccentric and the second eccentric, the link having a first effective link arm length between the first eccentric and the second eccentric for driving the first eccentric to operate the wiper arm when operated in a first direction.

Abstract: The application programming interface permits an application to specify resources to be used by shaders, executed by the GPU, through a data structure called the “root arguments.” A root signature is a data structure in an application that defines the layout of the root arguments used by an application. The root arguments are a data structure resulting from the application populating locations in memory according to the root signature. The root arguments can include one or more constant values or other state information, and/or one or more pointers to memory locations which can contain descriptors, and/or one or more descriptor tables. Thus, the root arguments can support multiple levels of indirection through which a GPU can identify resources that are available for shaders to access.

Abstract: A procedural texture relates texel coordinates to color values through an arbitrary function, herein called a texel shader. The procedural texture is defined by a dimension, size, texel format and the texel shader. Texel coordinates are an input to the texel shader, which generates a color value for those texel coordinates. A renderer can be implemented either in hardware, such as part of a graphics processor, or in software as a computer program executed by a processor. The renderer samples from the procedural texture in response to texel coordinates, and evaluates the texel shader on demand. Filtering also can be applied automatically to results. The results of the texel shader invocations are stored in a texture cache to take advantage of spatial and temporal locality. Results are shared among threads, processes and the like through the texture cache.

Abstract: In one example, a graphic computing device may apply a clipping technique to accurately and efficiently render a graphic data set. A central processing unit may generate a convex polygonal clip from a two-dimensional polygon. The central processing unit may calculate a clipping plane for a convex polygonal clip based on an edge of the convex polygonal clip. A graphics processor may apply the convex polygonal clip in a pixel shader.

Abstract: A resource used by a shader executed by a graphics processing unit is referenced using a “descriptor”. Descriptors are grouped together in memory called a descriptor heap. Applications allocate and store descriptors in descriptor heaps. Applications also create one or more descriptor tables specifying a subrange of a descriptor heap. To bind resources to a shader, descriptors are first loaded into a descriptor heap. When the resources are to be used by a set of executing shaders, descriptor tables are defined on the GPU identifying ranges within the descriptor heap. Shaders, when executing, refer to the currently defined descriptor tables to access the resources made available to them. If the shader is to be executed again with different resources, and if those resources are already in memory and specified in the descriptor heap, then the descriptor tables are changed to specify different ranges of the descriptor heap.

Abstract: The application programming interface permits an application to specify resources to be used by shaders, executed by the GPU, through a data structure called the “root arguments.” A root signature is a data structure in an application that defines the layout of the root arguments used by an application. The root arguments are a data structure resulting from the application populating locations in memory according to the root signature. The root arguments can include one or more constant values or other state information, and/or one or more pointers to memory locations which can contain descriptors, and/or one or more descriptor tables. Thus, the root arguments can support multiple levels of indirection through which a GPU can identify resources that are available for shaders to access.

Abstract: An aircraft includes an aircraft body including one or more exterior surfaces and a projector secured to a component of the aircraft. The projector is configured to selectably project one or more images on the one or more exterior surfaces. A method of displaying a projected image on an aircraft surface includes moving a landing gear assembly of the aircraft from a retracted position to an extending position, activating a projector disposed at the landing gear assembly, and displaying a projected image at the aircraft surface via activation of the projector.

Abstract: Mechanisms for generating an analysis result about a machine are provided. A device generates a first health management (HM) analysis result regarding a machine based on real-time first sensor information received during a first period of time and on a first version HM analytic model. The device provides, to an off-board device, a plurality of sensor information comprising the real-time first sensor information and that is generated during the first period of time. The device receives a second version HM analytic model that is based at least in part on the plurality of sensor information and fault information that identifies actual faults that have occurred on the machine. The device generates a second HM analysis result regarding the machine based on real-time second sensor information received during a second period of time and on the second version HM analytic model.

Abstract: A method for tile-based rendering of content. Content may be rendered in a memory region organized as multiple tiles. In scenarios in which content is generated in layers, for operations that involve compositing image layers, an order in which portions of the image are processed may be selected to reduce the aggregate number of memory accesses times, which in turn may improve the performance of a computer that uses tile-based rendering. An image may be processed such that operations relating to rendering portions of different layers corresponding to the same tile are performed sequentially. Such processing may be used in a computer with a graphics processing unit that supports tile-based rendering, and may be particularly well suited for computers with a slate form factor. An interface to a graphics processing utility within the computer may provide a flag to allow an application to specify whether operations may be reordered.

Abstract: Methods and computer-storage media are provided for rendering three-dimensional (3D) graphics by tessellating objects using novel structures and algorithms. Rendering utilizing “patches,” configurable functions that include a specified number of control points, allows for computation on a per-patch or per-control-point basis, in addition to traditional per-vertex, per-primitive, and per-pixel methods. This produces a number of advantages over previous tessellation methods, including the reuse of computations across existing vertices and the ability to process at a lower frequency. The operations to compute points are simplified in order to optimize system resources used in the process. Transitions from un-tessellated to tessellated objects are smoother utilizing the present invention, while developers have more flexibility in the level of detail present at different edges of the same patch.

Abstract: a Systems and methods for uplock systems are provided. An uplock system may comprise a body, a hook having an opening defining at least a first surface and a second surface, the hook being rotationally engaged with the body, a first biasing member configured to bias the hook in a first rotational direction relative to the body, and a cam in operable communication with the hook and the body such that the hook has at least a first stable position and a second stable position relative to the body when biased in the first rotational direction.

Abstract: A method for tile-based rendering of content. Content may be rendered in a memory region organized as multiple tiles. In scenarios in which content is generated in layers, for operations that involve compositing image layers, an order in which portions of the image are processed may be selected to reduce the aggregate number of memory accesses times, which in turn may improve the performance of a computer that uses tile-based rendering. An image may be processed such that operations relating to rendering portions of different layers corresponding to the same tile are performed sequentially. Such processing may be used in a computer with a graphics processing unit that supports tile-based rendering, and may be particularly well suited for computers with a slate form factor. An interface to a graphics processing utility within the computer may provide a flag to allow an application to specify whether operations may be reordered.

Abstract: Methods and computer-storage media are provided for rendering three-dimensional (3D) graphics by tessellating objects using novel structures and algorithms. Rendering utilizing “patches,” configurable functions that include a specified number of control points, allows for computation on a per-patch or per-control-point basis, in addition to traditional per-vertex, per-primitive, and per-pixel methods. This produces a number of advantages over previous tessellation methods, including the reuse of computations across existing vertices and the ability to process at a lower frequency. The operations to compute points are simplified in order to optimize system resources used in the process. Transitions from un-tessellated to tessellated objects are smoother utilizing the present invention, while developers have more flexibility in the level of detail present at different edges of the same patch.

Abstract: A method for tile-based rendering of content. Content may be rendered in a memory region organized as multiple tiles. In scenarios in which content is generated in layers, for operations that involve compositing image layers, an order in which portions of the image are processed may be selected to reduce the aggregate number of memory accesses times, which in turn may improve the performance of a computer that uses tile-based rendering. An image may be processed such that operations relating to rendering portions of different layers corresponding to the same tile are performed sequentially. Such processing may be used in a computer with a graphics processing unit that supports tile-based rendering, and may be particularly well suited for computers with a slate form factor. An interface to a graphics processing utility within the computer may provide a flag to allow an application to specify whether operations may be reordered.

Abstract: An apparatus for training the upper extremities is taught and claimed. The invention comprises a paddle subassembly adapted to slidingly engage with a mount subassembly. A user interacts with the apparatus by pulling on a climbing hold located on the paddle subassembly. The paddle subassembly offers increasing resistance to the user, thus increasing the strength and endurance of the muscle groups exercised. Resistance elements such as, for example, bungee cords and the like are used to provide resistance. The climbing hold is interchangeable, thus allowing the use of various styles and shapes of climbing holds in order to provide a variety of strength exercises for the hands. The slide of the invention is adapted to rotate to a plurality of discrete angles. The invention is particularly useful and training the muscles of the fingers, hands, wrists and forearms in preparation for rock climbing activities.

Abstract: In one example, a graphic computing device may apply a clipping technique to accurately and efficiently render a graphic data set. A central processing unit may generate a convex polygonal clip from a two-dimensional polygon. The central processing unit may calculate a clipping plane for a convex polygonal clip based on an edge of the convex polygonal clip. A graphics processor may apply the convex polygonal clip in a pixel shader.

Abstract: The application programming interface permits an application to specify resources to be used by shaders, executed by the GPU, through a data structure called the “root arguments.” A root signature is a data structure in an application that defines the layout of the root arguments used by an application. The root arguments are a data structure resulting from the application populating locations in memory according to the root signature. The root arguments can include one or more constant values or other state information, and/or one or more pointers to memory locations which can contain descriptors, and/or one or more descriptor tables. Thus, the root arguments can support multiple levels of indirection through which a GPU can identify resources that are available for shaders to access.