Patents by Inventor Amar Vellanki

Amar Vellanki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230379592
    Abstract: A system for relaying communication for a PHY/data link level communication protocol may include a first device having a first and second transceiver, the first transceiver having a first protocol controller configured to detect a first bus condition and second transceiver having a second protocol controller configured to detect a second bus condition and a switching matrix coupled to the first and second transceiver and configured to operate in a relaying mode to enable: the first protocol controller to control a physical layer of the second transceiver and enables the second protocol controller to control a physical layer of the first transceiver, a physical layer of a first transmitter of the first transceiver to receive an output of a second receiver of the second transceiver, and the physical layer of a second transmitter of the second transceiver to receive an output of a first receiver of the first transceiver.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 23, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Wai-Shun SHUM, Amar VELLANKI, Jeffrey SKARZYNSKI, Gautham S. SIVASANKAR, Xingdong DAI, Venugopal CHOUKINISHI, Xiaofan FEI, Xin ZHAO
  • Publication number: 20230366747
    Abstract: A current digital-to-analog converter may be used in a system for measuring temperature of a thermistor, with mismatch reduction techniques applied to digital-to-analog converter elements of the digital-to-analog converter in order to maximize accuracy and precisions of the temperature measurement.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 16, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Vamsikrishna PARUPALLI, Zhong YOU, Johann G. GABORIAU, Amar VELLANKI, Vikrant ARUMUGAM
  • Patent number: 11677360
    Abstract: A multi-path audio amplification system that provides an output drive signal to electromechanical output transducers provides improved undistorted headroom, reduced path switching noise, and/or improved frequency response performance. Multiple signal amplification paths receive an audio input signal and have corresponding multiple output stages that have differing output impedances. A mode selector selects an active one of the multiple signal amplification paths is selected to supply the output drive signal. Outputs of the multiple output stages are coupled to the electromechanical transducer to provide the output drive signal and at least one of the multiple signal amplification paths includes an equalization filter for filtering the audio input signal to compensate for phase or gain differences referenced from the input to the outputs of the multiple output stages due to interaction between the differing output impedances and an impedance of the electromechanical transducer.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: June 13, 2023
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Leyi Yin, John L. Melanson, Eric Lindemann, Amar Vellanki, Jianhao Chen, Venugopal Choukinishi, Wai-Shun Shum, Xiaofan Fei
  • Patent number: 11539331
    Abstract: An amplification system with an output driver stage for providing an output signal to acoustic output transducers such as speakers or haptic output devices removes signal distortion caused by output stage non-linearities by pre-distorting an input signal. The system includes the output driver stage, an input stage for receiving the input signal, and a processing block that receives the input signal and provides an output signal to the output driver stage. The processing block includes a pre-distortion circuit that applies a pre-distortion function to the input signal to generate the output signal if a signal level of the input signal is greater than a threshold amplitude, and if the signal level is less than or equal to the threshold amplitude, generates the output signal from the input signal by bypassing the pre-distortion circuit.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: December 27, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Amar Vellanki, Xin Zhao, Jing Bai, John L. Melanson, Ku He, Wai-Shun Shum, Xiaofan Fei, Alan M. Morton
  • Publication number: 20220329212
    Abstract: An amplification system with an output driver stage for providing an output signal to acoustic output transducers such as speakers or haptic output devices removes signal distortion caused by output stage non-linearities by pre-distorting an input signal. The system includes the output driver stage, an input stage for receiving the input signal, and a processing block that receives the input signal and provides an output signal to the output driver stage. The processing block includes a pre-distortion circuit that applies a pre-distortion function to the input signal to generate the output signal if a signal level of the input signal is greater than a threshold amplitude, and if the signal level is less than or equal to the threshold amplitude, generates the output signal from the input signal by bypassing the pre-distortion circuit.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 13, 2022
    Inventors: Amar Vellanki, Xin Zhao, Jing Bai, John L. Melanson, Ku He, Wai-Shun Shum, Xiaofan Fei, Alan M. Morton
  • Publication number: 20220329216
    Abstract: A multi-path audio amplification system that provides an output drive signal to electromechanical output transducers provides improved undistorted headroom, reduced path switching noise, and/or improved frequency response performance. Multiple signal amplification paths receive an audio input signal and have corresponding multiple output stages that have differing output impedances. A mode selector selects an active one of the multiple signal amplification paths is selected to supply the output drive signal. Outputs of the multiple output stages are coupled to the electromechanical transducer to provide the output drive signal and at least one of the multiple signal amplification paths includes an equalization filter for filtering the audio input signal to compensate for phase or gain differences referenced from the input to the outputs of the multiple output stages due to interaction between the differing output impedances and an impedance of the electromechanical transducer.
    Type: Application
    Filed: November 8, 2021
    Publication date: October 13, 2022
    Inventors: Leyi Yin, John L. Melanson, Eric Lindemann, Amar Vellanki, Jianhao Chen, Venugopal Choukinishi, Wai-Shun Shum, Xiaofan Fei
  • Publication number: 20220284877
    Abstract: An audio processing system reduces perception of audible artifacts due to changes in an element in an audio channel of the audio processing system. The system reproduces an audio input signal and produces an audio output signal with the audio channel. The channel has an adjustable or selectable element that, responsive to a control signal, changes a characteristic of the audio processing channel, which generates a transient in the audio output signal. The systems include a level detector for measuring a signal level of the audio input signal and a controller responsive to an output of the level detector to determine a masking time interval available from the audio output signal due to signal content in the audio input signal. The controller generates the control signal to change the characteristic of the audio processing channel so that at least a portion of the transient occurs in the masking time interval.
    Type: Application
    Filed: December 2, 2021
    Publication date: September 8, 2022
    Inventors: Ku He, Venugopal Choukinishi, Kemal S. Demirci, David M. Olivenbaum, Amar Vellanki, Xin Zhao, Wai-Shun Shum, Xiaofan Fei
  • Patent number: 11431310
    Abstract: A multi-path subsystem may include a first processing path, a second processing path, a mixed signal return path, and a calibration engine configured to: estimate and cancel a direct current (DC) offset of the mixed signal return path, estimate and cancel a DC offset between the first processing path and the second processing path, estimate and cancel a phase difference between the first processing path and a sum of the second processing path and the mixed signal return path, estimate and cancel a return path gain of the mixed signal return path, and track and correct for a gain difference between the first processing path and the second processing path.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: August 30, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Tejasvi Das, John L. Melanson
  • Patent number: 11329620
    Abstract: A method for calibrating gain in a multi-path subsystem having a first processing path, a second processing path, and a mixed signal return path, may include low-pass filtering an input signal and a mixed signal return path signal generated from the input signal at subsonic frequencies to generate a filtered input signal and a filtered mixed signal return path signal and tracking and correcting for a gain difference between the first processing path and the second processing path based on the filtered input signal and the filtered mixed signal return path signal.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: May 10, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann G. Gaboriau, David M. Olivenbaum, Xiaofan Fei, Amar Vellanki, Venugopal Choukinishi, Gautham Sivasankar, Wai-Shun Shum
  • Patent number: 11119138
    Abstract: A method may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from an input signal indicative of a variance in a capacitance of the capacitor, detecting the modulated signal with a detector to generate a detected modulated signal that has a phase shift relative to the excitation signal, demodulating the detected modulated signal into an in-phase component and a quadrature component using a reference signal, nullifying the quadrature component by setting a phase of the reference signal relative to the excitation signal to compensate for the phase shift, and outputting the in-phase component as an unmodulated output signal representative of the capacitance.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: September 14, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Vikrant Arumugam, Amar Vellanki, Vamsikrishna Parupalli, Zhong You, Johann G. Gaboriau, John L. Melanson
  • Patent number: 11047890
    Abstract: A method of determining a phase misalignment between a first signal generated from a first signal path and a second signal generated from a second signal path may include obtaining multiple samples of the first signal proximate to when the first signal crosses zero wherein the first signal can be approximated as linear; obtaining multiple samples of the second signal proximate to when the second signal crosses zero wherein the first signal can be approximated as linear; based on the multiple samples of the first signal, approximating a first time at which the first signal crosses zero; based on the multiple samples of the second signal, approximating a second time at which the second signal crosses zero; and determining the phase misalignment between the first signal and the second signal based on a difference between the first time and the second time.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: June 29, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Gautham S. Sivasankar, Tejasvi Das, Emmanuel Marchais, Amar Vellanki, Leyi Yin, John L. Melanson, Venugopal Choukinishi
  • Patent number: 11035894
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: June 15, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Zhong You, Johann G. Gaboriau
  • Publication number: 20200343871
    Abstract: A method for calibrating gain in a multi-path subsystem having a first processing path, a second processing path, and a mixed signal return path, may include low-pass filtering an input signal and a mixed signal return path signal generated from the input signal at subsonic frequencies to generate a filtered input signal and a filtered mixed signal return path signal and tracking and correcting for a gain difference between the first processing path and the second processing path based on the filtered input signal and the filtered mixed signal return path signal.
    Type: Application
    Filed: July 14, 2020
    Publication date: October 29, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Johann G. GABORIAU, David M. OLIVENBAUM, Xiaofan FEI, Amar VELLANKI, Venugopal CHOUKINISHI, Gautham SIVASANKAR, Wai-Shun SHUM
  • Publication number: 20200292602
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Amar VELLANKI, Zhong YOU, Johann G. GABORIAU
  • Patent number: 10770086
    Abstract: A method may include receiving a stream of serial pulse-density modulation (PDM) data representing a first channel of data synchronized with a rising edge of a clock associated with the serial PDM data and a second channel of data synchronized with a falling edge of the clock, wherein each of the first channel of data and the second channel of data include encoded datagrams wherein each encoded datagram comprises more than one digital bit, detecting an invalid state associated with the stream, and responsive to detecting the invalid state, determining boundaries of each encoded datagram of the stream based on where within the stream the invalid state occurred.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: September 8, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Masoud Farshbaf Zinati, Arun Ramani, Amar Vellanki, Xiaofan Fei
  • Patent number: 10718801
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: July 21, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Zhong You, Johann G. Gaboriau
  • Publication number: 20200228079
    Abstract: A multi-path subsystem may include a first processing path, a second processing path, a mixed signal return path, and a calibration engine configured to: estimate and cancel a direct current (DC) offset of the mixed signal return path, estimate and cancel a DC offset between the first processing path and the second processing path, estimate and cancel a phase difference between the first processing path and a sum of the second processing path and the mixed signal return path, estimate and cancel a return path gain of the mixed signal return path, and track and correct for a gain difference between the first processing path and the second processing path.
    Type: Application
    Filed: March 24, 2020
    Publication date: July 16, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Amar VELLANKI, Tejasvi DAS, John L. MELANSON
  • Patent number: 10649015
    Abstract: A method may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from an input signal indicative of a variance in a capacitance of the capacitor, detecting the modulated signal with a detector to generate a detected modulated signal that has a phase shift relative to the excitation signal, demodulating the detected modulated signal into an in-phase component and a quadrature component using a reference signal, nullifying the quadrature component by setting a phase of the reference signal relative to the excitation signal to compensate for the phase shift, and outputting the in-phase component as an unmodulated output signal representative of the capacitance.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: May 12, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Vikrant Arumugam, Amar Vellanki, Vamsikrishna Parupalli, Zhong You, Johann G. Gaboriau, John L. Melanson
  • Patent number: 10637423
    Abstract: A multi-path subsystem may include a first processing path, a second processing path, a mixed signal return path, and a calibration engine configured to: estimate and cancel a direct current (DC) offset of the mixed signal return path, estimate and cancel a DC offset between the first processing path and the second processing path, estimate and cancel a phase difference between the first processing path and a sum of the second processing path and the mixed signal return path, estimate and cancel a return path gain of the mixed signal return path, and track and correct for a gain difference between the first processing path and the second processing path.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: April 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Tejasvi Das, John L. Melanson
  • Patent number: 10404248
    Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: September 3, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Tejasvi Das, Alan Mark Morton, Xin Zhao, Lei Zhu, Xiaofan Fei, Johann G. Gaboriau, John L. Melanson, Amar Vellanki