Patents by Inventor Amian Majumdar

Amian Majumdar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Field effect transistor with metal source/drain regions
    Patent number: 7879675
    Abstract: A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed adjacent the channel region on opposite sides of the gate electrode. The source and drain regions each comprise a semiconductor portion adjacent to and in contact with the semiconductor channel and a metal portion adjacent to and in contact with the semiconductor portion.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: February 1, 2011
    Assignee: Intel Corporation
    Inventors: Marko Radosavljevic, Suman Datta, Brian S. Doyle, Jack Kavalieros, Justin K. Brask, Mark L. Doczy, Amian Majumdar, Robert S. Chau
  • Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer
    Patent number: 7767546
    Abstract: A semiconductor wafer structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer, the electrically conductive layer further having one or more shallow trench isolation (STI) regions formed therein; an etch stop layer formed on the electrically conductive layer and the one or more STI regions; an upper insulating layer formed on the etch stop layer; and a semiconductor layer formed on the upper insulating layer. A subsequent active area level STI scheme, in conjunction with front gate formation over the semiconductor layer, is also disclosed.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Dennard, David R. Greenberg, Amian Majumdar, Leathen Shi, Jeng-Bang Yau
  • FIELD EFFECT TRANSISTOR WITH METAL SOURCE/DRAIN REGIONS
    Publication number: 20090325350
    Abstract: A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed adjacent the channel region on opposite sides of the gate electrode. The source and drain regions each comprise a semiconductor portion adjacent to and in contact with the semiconductor channel and a metal portion adjacent to and in contact with the semiconductor portion.
    Type: Application
    Filed: May 2, 2008
    Publication date: December 31, 2009
    Inventors: Marko Radosavljevic, Suman Datta, Brian S. Doyle, Jack Kavalieros, Justin K. Brask, Mark L. Doczy, Amian Majumdar, Robert S. Chau
  • Field effect transistor with metal source/drain regions
    Publication number: 20060202266
    Abstract: A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed adjacent the channel region on opposite sides of the gate electrode. The source and drain regions each comprise a semiconductor portion adjacent to and in contact with the semiconductor channel and a metal portion adjacent to and in contact with the semiconductor portion.
    Type: Application
    Filed: March 14, 2005
    Publication date: September 14, 2006
    Inventors: Marko Radosavljevic, Suman Datta, Brian Doyle, Jack Kavalieros, Justin Brask, Mark Doczy, Amian Majumdar, Robert Chau