Patents by Inventor Amir Al-Bayati
Amir Al-Bayati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9337072Abstract: The present invention generally provides methods and apparatus for monitoring and maintaining flatness of a substrate in a plasma reactor. Certain embodiments of the present invention provide a method for processing a substrate comprising positioning the substrate on an electrostatic chuck, applying an RF power between the an electrode in the electrostatic chuck and a counter electrode positioned parallel to the electrostatic chuck, applying a DC bias to the electrode in the electrostatic chuck to clamp the substrate on the electrostatic chuck, and measuring an imaginary impedance of the electrostatic chuck.Type: GrantFiled: November 19, 2010Date of Patent: May 10, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Ganesh Balasubramanian, Amit Bansal, Eller Y. Juco, Mohamad Ayoub, Hyung-Joon Kim, Karthik Janakiraman, Sudha Rathi, Deenesh Padhi, Martin Jay Seamons, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Amir Al-Bayati, Derek R. Witty, Hichem M'Saad, Anton Baryshnikov, Chiu Chan, Shuang Liu
-
Patent number: 8900405Abstract: The disclosure concerns a process ring for the wafer support pedestal of a toroidal source plasma immersion ion implantation reactor. The process ring improves edge uniformity by providing a continuous surface extending beyond the wafer edge, in one embodiment. In another embodiment, the process ring includes a floating electrode that functions as an extension of the wafer support electrode by RF coupling at the bias frequency.Type: GrantFiled: November 14, 2007Date of Patent: December 2, 2014Assignee: Applied Materials, Inc.Inventors: Peter I. Porshnev, Majeed A. Foad, Kartik Ramaswamy, Biagio Gallo, Hiroji Hanawa, Andrew Nguyen, Kenneth S. Collins, Amir Al-Bayati
-
Patent number: 8902428Abstract: Provided are methods and apparatus for determining the crystal fraction of a casted-mono silicon wafer. A light source is directed at the wafer and the transmission or reflection is measured by a detector. An image of the wafer is generated by a processor and the crystal fraction is calculated from the generated image. The crystal fraction is correlated to the efficiency of the solar cell produced, allowing for the rejection of inferior wafers prior to processing.Type: GrantFiled: March 15, 2012Date of Patent: December 2, 2014Assignee: Applied Materials, Inc.Inventors: Asaf Schlezinger, Amir Al-Bayati
-
Patent number: 8895842Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first TCO layer disposed on a substrate, a second TCO layer disposed on the first TCO layer, and a p-type silicon containing layer formed on the second TCO layer. In another embodiment, a method of forming a photovoltaic device includes forming a first TCO layer on a substrate, forming a second TCO layer on the first TCO layer, and forming a first p-i-n junction on the second TCO layer.Type: GrantFiled: June 9, 2009Date of Patent: November 25, 2014Assignee: Applied Materials, Inc.Inventors: Shuran Sheng, Yong Kee Chae, Stefan Klein, Amir Al-Bayati, Bhaskar Kumar
-
Patent number: 8796769Abstract: A method including introducing a species into a substrate including semiconductor material; and translating linearly focused electromagnetic radiation across a surface of the substrate, the electromagnetic radiation being sufficient to thermally influence the species. An apparatus including an electromagnetic radiation source; a stage having dimensions suitable for accommodating a semiconductor substrate within a chamber; an optical element disposed between the electromagnetic radiation source and the stage to focus radiation from the electromagnetic radiation source into a line having a length determined by the diameter of a substrate to be placed on the stage; and a controller coupled to the electromagnetic radiation source including machine readable program instructions that allow the controller to control the depth into which a substrate is exposed to the radiation.Type: GrantFiled: September 14, 2012Date of Patent: August 5, 2014Assignee: Applied Matierials, Inc.Inventors: Dean C. Jennings, Amir Al-Bayati
-
Publication number: 20130242287Abstract: Provided are methods and apparatus for determining the crystal fraction of a casted-mono silicon wafer. A light source is directed at the wafer and the transmission or reflection is measured by a detector. An image of the wafer is generated by a processor and the crystal fraction is calculated from the generated image. The crystal fraction is correlated to the efficiency of the solar cell produced, allowing for the rejection of inferior wafers prior to processing.Type: ApplicationFiled: March 15, 2012Publication date: September 19, 2013Applicant: Applied Materials, Inc.Inventors: Asaf Schlezinger, Amir Al-Bayati
-
Patent number: 8501568Abstract: A methods of forming a flash memory device are provided. The flash memory device comprises a silicon dioxide layer on a substrate and a silicon nitride layer that is formed on the silicon dioxide layer. The properties of the silicon nitride layer can be modified by any of: exposing the silicon nitride layer to ultraviolet radiation, exposing the silicon nitride layer to an electron beam, and by plasma treating the silicon nitride layer. A dielectric material is deposited on the silicon nitride layer and a conductive date is formed over the dielectric material. The flash memory device with modified silicon nitride layer provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.Type: GrantFiled: October 22, 2008Date of Patent: August 6, 2013Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
-
Patent number: 8445075Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.Type: GrantFiled: December 22, 2010Date of Patent: May 21, 2013Assignee: Applied Materials, Inc.Inventors: Huiwen Xu, Mei-Yee Shek, Li-Qun Xia, Amir Al-Bayati, Derek Witty, Hichem M'Saad
-
Publication number: 20130008878Abstract: A method including introducing a species into a substrate including semiconductor material; and translating linearly focused electromagnetic radiation across a surface of the substrate, the electromagnetic radiation being sufficient to thermally influence the species. An apparatus including an electromagnetic radiation source; a stage having dimensions suitable for accommodating a semiconductor substrate within a chamber; an optical element disposed between the electromagnetic radiation source and the stage to focus radiation from the electromagnetic radiation source into a line having a length determined by the diameter of a substrate to be placed on the stage; and a controller coupled to the electromagnetic radiation source including machine readable program instructions that allow the controller to control the depth into which a substrate is exposed to the radiation.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: Applied Materials, Inc.Inventors: Dean C. Jennings, Amir Al-Bayati
-
Patent number: 8288239Abstract: A method including introducing a species into a substrate including semiconductor material; and translating linearly focused electromagnetic radiation across a surface of the substrate, the electromagnetic radiation being sufficient to thermally influence the species. An apparatus including an electromagnetic radiation source; a stage having dimensions suitable for accommodating a semiconductor substrate within a chamber; an optical element disposed between the electromagnetic radiation source and the stage to focus radiation from the electromagnetic radiation source into a line having a length determined by the diameter of a substrate to be placed on the stage; and a controller coupled to the electromagnetic radiation source including machine readable program instructions that allow the controller to control the depth into which a substrate is exposed to the radiation.Type: GrantFiled: September 30, 2002Date of Patent: October 16, 2012Assignee: Applied Materials, Inc.Inventors: Dean C. Jennings, Amir Al-Bayati
-
Patent number: 8252653Abstract: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.Type: GrantFiled: October 21, 2008Date of Patent: August 28, 2012Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
-
Publication number: 20120211164Abstract: Embodiments described herein relate to a substrate processing system that integrates substrate edge processing capabilities. Illustrated examples of the processing system include, without limitations, a factory interface, a loadlock chamber, a transfer chamber, and one or more twin process chambers having two or more processing regions that are isolatable from each other and share a common gas supply and a common exhaust pump. The processing regions in each twin process chamber include separate gas distribution assemblies and RF power sources to provide plasma at selective regions on a substrate surface in each processing region. Each twin process chamber is thereby configured to allow multiple, isolated processes to be performed concurrently on at least two substrates in the processing regions.Type: ApplicationFiled: April 25, 2012Publication date: August 23, 2012Applicant: Applied Materials, Inc.Inventors: Ashish Shah, Dale R. DuBois, Ganesh Balasubramanian, Mark A. Fodor, Eui Kyoon Kim, Chiu Chan, Karthik Janakiraman, Thomas Nowak, Joseph C. Werner, Visweswaren Sivaramakrishnan, Mohamad Ayoub, Amir Al-Bayati, Jianhua Zhou
-
Publication number: 20120199071Abstract: Embodiments described herein relate to a plasma chamber and processing system utilizing robust components. In one embodiment, a chamber is provided. The chamber includes a body having an interior volume, a gas distribution assembly disposed in the interior volume opposing a substrate support, the gas distribution assembly having a coolant channel disposed thereon, and a first hollow conduit and a second hollow conduit coupled to the body and in fluid communication with the interior volume.Type: ApplicationFiled: April 13, 2012Publication date: August 9, 2012Applicant: Applied Materials, Inc.Inventors: KENNETH S. COLLINS, Andrew N. Nguyen, Kartik Ramaswamy, Hiroji Hanawa, Douglas A. Buchberger, JR., Daniel J. Hoffman, Amir Al-Bayati
-
Patent number: 8197636Abstract: Embodiments described herein relate to a substrate processing system that integrates substrate edge processing capabilities. Illustrated examples of the processing system include, without limitations, a factory interface, a loadlock chamber, a transfer chamber, and one or more twin process chambers having two or more processing regions that are isolatable from each other and share a common gas supply and a common exhaust pump. The processing regions in each twin process chamber include separate gas distribution assemblies and RF power sources to provide plasma at selective regions on a substrate surface in each processing region. Each twin process chamber is thereby configured to allow multiple, isolated processes to be performed concurrently on at least two substrates in the processing regions.Type: GrantFiled: April 21, 2008Date of Patent: June 12, 2012Assignee: Applied Materials, Inc.Inventors: Ashish Shah, Dale R. DuBois, Ganesh Balasubramanian, Mark A. Fodor, Eui Kyoon Kim, Chiu Chan, Karthik Janakiraman, Thomas Nowak, Joseph C. Werner, Visweswaren Sivaramakrishnan, Mohamad Ayoub, Amir Al-Bayati, Jianhua Zhou
-
Patent number: 8058156Abstract: A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, the plural orifices oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. The process includes placing a workpiece in the process region, the workpiece having a workpiece surface generally facing the surface plane of the closest one of the plural ion shower grids, and furnishing the selected species into the ion generation region. The process further includes evacuating the process region, and applying plasma source power to generate a plasma of the selected species in the ion generation region.Type: GrantFiled: July 20, 2004Date of Patent: November 15, 2011Assignee: Applied Materials, Inc.Inventors: Hiroji Hanawa, Tsutomu Tanaka, Kenneth S. Collins, Amir Al-Bayati, Kartik Ramaswamy, Andrew Nguyen
-
Publication number: 20110263074Abstract: Apparatus and methods for forming a silicon-containing i-layer on a substrate for a thin film photovoltaic cell are disclosed. The apparatus includes a chamber body defining a processing region containing the substrate, a hydrogen source and a silane source coupled to a plasma generation region, an RF power source that applies power at a power level in the plasma generation region to generate a plasma and deposit the silicon-containing i-layer at a selected deposition rate to a selected thickness and a controller. The controller controls the power level and the deposition rate of the i-layer on the substrate such that the thin film solar cell exhibits light induced damage that conforms to a linear fit of the product of the RF power, the deposition rate and the selected thickness of the i-layer.Type: ApplicationFiled: April 22, 2010Publication date: October 27, 2011Applicant: Applied Materials, Inc.Inventors: Amir Al-Bayati, Yong K. Chae, Shuran Sheng, Bhaskar Kumar, Eran Valfer
-
Publication number: 20110104891Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.Type: ApplicationFiled: January 7, 2011Publication date: May 5, 2011Inventors: AMIR AL-BAYATI, Alexandros T. Demos, Kang Sub Yim, Mehul Naik, Zhenjiang David Cui, Mihaela Balseanu, Meiyee Maggie Le Shek, Li-Qun Xia
-
Publication number: 20110090613Abstract: The present invention generally provides methods and apparatus for monitoring and maintaining flatness of a substrate in a plasma reactor. Certain embodiments of the present invention provide a method for processing a substrate comprising positioning the substrate on an electrostatic chuck, applying an RF power between the an electrode in the electrostatic chuck and a counter electrode positioned parallel to the electrostatic chuck, applying a DC bias to the electrode in the electrostatic chuck to clamp the substrate on the electrostatic chuck, and measuring an imaginary impedance of the electrostatic chuck.Type: ApplicationFiled: November 19, 2010Publication date: April 21, 2011Inventors: Ganesh Balasubramanian, Amit Bansal, Eller Y. Juco, Mohamad Ayoub, Hyung-Joon Kim, Karthik Janakiraman, Sudha Rathi, Deenesh Padhi, Martin Jay Seamons, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Amir Al-Bayati, Derek R. Witty, Hichem M'Saad, Anton Baryshnikov, Chiu Chan, Shuang Liu
-
Publication number: 20110092077Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.Type: ApplicationFiled: December 22, 2010Publication date: April 21, 2011Inventors: HUIWEN XU, MEI-YEE SHEK, LI-QUN XIA, AMIR AL-BAYATI, DEREK WITTY, HICHEM M'SAAD
-
Patent number: 7879683Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.Type: GrantFiled: October 9, 2007Date of Patent: February 1, 2011Assignee: Applied Materials, Inc.Inventors: Amir Al-Bayati, Alexandros T. Demos, Kang Sub Yim, Mehul Naik, Zhenjiang “David” Cui, Mihaela Balseanu, Meiyee (Maggie Le) Shek, Li-Qun Xia