Abstract: A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient of silicon and nitrogen provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: Methods and apparatus for electron beam treatment of a substrate are provided. An electron beam apparatus that includes a vacuum chamber, at least one thermocouple assembly in communication with the vacuum chamber, a heating device in communication with the vacuum chamber, and combinations thereof are provided. In one embodiment, the vacuum chamber comprises an electron source wherein the electron source comprises a cathode connected to a high voltage source, an anode connected to a low voltage source, and a substrate support. In another embodiment, the vacuum chamber comprises a grid located between the anode and the substrate support. In one embodiment the heating device comprises a first parallel light array and a second light array positioned such that the first parallel light array and the second light array intersect. In one embodiment the thermocouple assembly comprises a temperature sensor made of aluminum nitride.

Abstract: A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural elongate orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid.

Abstract: A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient of silicon and nitrogen provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: A methods of forming a flash memory device are provided. The flash memory device comprises a silicon dioxide layer on a substrate and a silicon nitride layer that is formed on the silicon dioxide layer. The properties of the silicon nitride layer can be modified by any of: exposing the silicon nitride layer to ultraviolet radiation, exposing the silicon nitride layer to an electron beam, and by plasma treating the silicon nitride layer. A dielectric material is deposited on the silicon nitride layer and a conductive date is formed over the dielectric material. The flash memory device with modified silicon nitride layer provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: A method for ion implanting a species into a surface layer of a workpiece in a chamber includes placing the workpiece in a processing zone of the chamber bounded by a chamber side wall and a chamber ceiling facing said workpiece and between a pair of ports of the chamber near generally opposite sides to the processing zone and connected together by a conduit external of the chamber. The method further includes introducing into the chamber a process gas comprising the species to be implanted, and further generating from the process gas a plasma current and causing the plasma current to oscillate in a circulatory reentrant path comprising the conduit and the processing zone.

Abstract: A plasma reactor for processing a semiconductor workpiece includes a reactor chamber and a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower reactor region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece support in the process region faces the lowermost one of the ion shower grids. A reactive species source furnishes into the ion generation region a chemical vapor deposition precursor species. The reactor further includes a vacuum pump coupled to the reactor region, a plasma source power applicator for generating a plasma in the ion generation region and a grid potential source coupled to the set of ion shower grids.

Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first TCO layer disposed on a substrate, a second TCO layer disposed on the first TCO layer, and a p-type silicon containing layer formed on the second TCO layer. In another embodiment, a method of forming a photovoltaic device includes forming a first TCO layer on a substrate, forming a second TCO layer on the first TCO layer, and forming a first p-i-n junction on the second TCO layer.

Abstract: A method of measuring ion dose in a plasma immersion ion implantation reactor during ion implantation of a selected species into a workpiece includes placing the workpiece on a pedestal in the reactor and feeding into the reactor a process gas comprising a species to be implanted into the workpiece, and then coupling RF plasma source power to a plasma in the reactor. It further includes coupling RF bias power to the workpiece by an RF bias power generator that is coupled to the workpiece through a bias feedpoint of the reactor and measuring RF current at the feedpoint to generate a current-related value, and then integrating the current-related over time to produce an ion implantation dose-related value.

Abstract: A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

Abstract: A process flow integration scheme employs one or more techniques to control stress in a semiconductor device formed thereby. In accordance with one embodiment, cumulative stress contributed by RTP of a nitride spacer and polysilicon gate, and subsequent deposition of a high stress etch stop layer, enhance strain and improve device performance. Germanium may be deposited or implanted into the gate structure in order to facilitate stress control.

Abstract: The disclosure concerns a process ring for the wafer support pedestal of a toroidal source plasma immersion ion implantation reactor. The process ring improves edge uniformity by providing a continuous surface extending beyond the wafer edge, in one embodiment. In another embodiment, the process ring includes a floating electrode that functions as an extension of the wafer support electrode by RF coupling at the bias frequency.

Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

Abstract: Methods for high temperature deposition an amorphous carbon film with improved step coverage are provided. In one embodiment, a method for of depositing an amorphous carbon film includes providing a substrate in a process chamber, heating the substrate at a temperature greater than 500 degrees Celsius, supplying a gas mixture comprising a hydrocarbon compound and an inert gas into the process chamber containing the heated substrate, and depositing an amorphous carbon film on the heated substrate having a stress of between 100 mega-pascal (MPa) tensile and about 100 mega-pascal (MPa) compressive.

Abstract: A method of ion implantation comprises the steps of: providing a semiconductor substrate; performing a pre-amorphisation implant in the semiconductor substrate in a direction of implant at an angle in the range of 20-60° to a normal to a surface of the semiconductor substrate, and performing an implant of a dopant in the semiconductor substrate to provide a shallow junction. In a feature of the invention, the method further comprises performing an implant of a defect trapping element in the semiconductor substrate and the pre-amorphisation implant step is performed at a first implant energy and the implant of a defect trapping element is performed at a second implant energy, the ratio of the first implant energy to the second implant energy being in the range of 10-40%.

Abstract: A method of electrostatically chucking a wafer while removing heat from the wafer in a plasma reactor includes providing a polished generally continuous surface on a puck, placing the wafer on the polished surface of the puck and cooling the puck. A chucking voltage is applied to an electrode within the puck to electrostatically pull the wafer onto the surface of the puck with sufficient force to attain a selected heat transfer coefficient between contacting surfaces of the puck and wafer.

Abstract: The present invention comprises an apparatus and method for etching at a substrate edge region. In one embodiment, the apparatus comprises a chamber having a process volume, a substrate support arranged inside the process volume and having a substrate support surface, a plasma generator coupled to the chamber and configured to supply an etching agent in a plasma phase to a peripheral region of the substrate support surface, and a gas delivery assembly coupled to a gas source for generating a radial gas flow over the substrate support surface from an approximately central region of the substrate support surface toward the peripheral region of the substrate support surface.

Abstract: Embodiments described herein relate to a substrate processing system that integrates substrate edge processing capabilities. Illustrated examples of the processing system include, without limitations, a factory interface, a loadlock chamber, a transfer chamber, and one or more twin process chambers having two or more processing regions that are isolatable from each other and share a common gas supply and a common exhaust pump. The processing regions in each twin process chamber include separate gas distribution assemblies and RF power sources to provide plasma at selective regions on a substrate surface in each processing region. Each twin process chamber is thereby configured to allow multiple, isolated processes to be performed concurrently on at least two substrates in the processing regions.

Abstract: A method of processing a workpiece includes placing the workpiece on a workpiece support pedestal in a main chamber with a gas distribution showerhead, introducing a process gas into a remote plasma source chamber and generating a plasma in the remote plasma source chamber, transporting plasma-generated species from the remote plasma source chamber to the gas distribution showerhead so as to distribute the plasma-generated species into the main chamber through the gas distribution showerhead, and applying plasma RF power into the main chamber.