Abstract: Methods and apparatuses directed to. In some examples, a die package includes voltage logic that provides a voltage to a voltage rail, clock logic that generates a clock signal, and adaptive clock distribution logic that receives the clock signal and the voltage. The adaptive clock distribution logic can increment an event count when the clock signal is above a threshold frequency, or when the voltage is below a threshold voltage level. The die package also includes a processor that can monitor the event counts during operation and determine a status of the adaptive clock distribution logic based on the event counts. In some examples, the processor can test the adaptive clock distribution logic by causing the clock signal to operate above the threshold frequency, or causing the voltage logic to provide the voltage below the threshold voltage level. The processor can then read the event counts to determine the status.

Abstract: Aspects relate to monitoring timing margin of logic paths and its degradation through an integrated circuit. In one example an integrated circuit has a logic path formed in the integrated circuit. A monitor circuit is formed in the integrated circuit near the logic path and configured to monitor a condition of the logic path and to generate a diagnostic code sequence to indicate the condition of the logic path over time. A monitor controller is configured to receive diagnostic codes of the diagnostic code sequence, to determine a condition of the integrated circuit based on the diagnostic code sequence, and to initiate a remedial action in response to the condition of the integrated circuit.

Abstract: Aspects relate to monitoring timing margin of logic paths and its degradation through an integrated circuit. In one example an apparatus includes an integrated circuit having a logic path formed in the integrated circuit and a monitor circuit formed in the integrated circuit. The monitor circuit is configured to monitor a condition of the logic path and to generate a diagnostic code sequence to indicate the condition of the logic path over time. A monitor controller is configured to receive diagnostic codes of the diagnostic code sequence, to store the diagnostic codes in a log with a corresponding time stamp and to determine a condition of the integrated circuit based on the diagnostic code sequence.

Abstract: Aspects relate to monitoring timing. In one example an apparatus includes a first sensor array formed in an integrated circuit, sensors of the first sensor array having paths through the integrated circuit and sensors of the first sensor array configured to generate one or more first level indications of a condition of the integrated circuit. A second sensor array is formed in the integrated circuit. Sensors of the second sensor array have paths through the integrated circuit and sensors of the second sensor array are configured to generate one or more second level indications of the condition of the integrated circuit. A monitor controller is coupled to the first sensor array and to the second sensor array and configured to receive the one or more first level indications and to actuate the second sensor array in response to the one or more first level indications.

Abstract: This disclosure provides systems, methods, and devices for vehicles with automated driving systems. In a first aspect, a method of isolation in an automated driving system includes detecting the error in a first domain of the automated driving system, isolating a second domain of the automated driving system from the first domain, maintaining operation of the second domain after isolating the second domain from the first domain, and bypassing, by the second domain, the first domain to transmit notifications to an external controller via a first communication interface. Other aspects and features are also claimed and described.

Abstract: Fail-safe and Fail-operational behavior can be achieved by providing two fully-redundant execution channels comprising at least first and second chiplet dies on a single SoC that are in communication with one another via a D2D interface. At least first and second instances of a first automotive safety integrity level (ASIL) domain circuit disposed on the at least first and second chiplet dies, respectively, perform at least a first ASIL domain process on one or more automotive sensor output signals to produce first and second output signals, respectively. A fault monitoring system monitors at least the first chiplet die for faults and assigns a first value to a selector signal if it detects a fault in the first chiplet die. A selector circuit outputs the second output signal from the system if the selector signal has the first value.

Abstract: Aspects of the present disclosure provide techniques and apparatus for testing a mixed safety system, such as system included in a vehicle. An example method of operating a vehicle includes operating an electronic control unit (ECU) in a first state; detecting one or more criteria being satisfied to perform a test associated with the ECU; and performing the test associated with the ECU in response to detecting the one or more criteria being satisfied, while the ECU is in a second state different from the first state.

Abstract: Aspects of the present disclosure provide techniques and apparatus for safety monitoring of a vehicle control system. An example method of operating a vehicle includes detecting an error associated with a system-on-a-chip (SoC) having a main domain and a safety domain, wherein the main domain is coupled to a first bus for communicating with one or more electronic control units (ECUs) and wherein the safety domain is coupled to a second bus for communicating with the one or more ECUs; indicating the error to the one or more ECUs via at least one of the first bus, the second bus, or a power management integrated circuit (PMIC) in response to detecting the error, wherein the PMIC is configured to supply power to the main domain or the safety domain; and performing one or more actions in response to detecting the error.

Abstract: Aspects of the present disclosure provide techniques and apparatus for safety monitoring of a vehicle control system. An example method of operating a vehicle includes detecting an error associated with a system-on-a-chip (SoC) having a main domain and a safety domain, wherein the main domain is coupled to a first bus for communicating with one or more electronic control units (ECUs) and wherein the safety domain is coupled to a second bus for communicating with the one or more ECUs; indicating the error to the one or more ECUs via at least one of the first bus, the second bus, or a power management integrated circuit (PMIC) in response to detecting the error, wherein the PMIC is configured to supply power to the main domain or the safety domain; and performing one or more actions in response to detecting the error.

Abstract: Techniques and apparatus for power supply monitoring in in-vehicle systems, such as advanced driver assistance systems (ADASs), in-vehicle infotainment (IVI) systems, and/or automated driving (AD) systems. One example method of power supply monitoring generally includes regulating power to a main domain of a system on a chip (SoC) using at least one main domain (MD) power management integrated circuit (PMIC); regulating power to a safety domain of the SoC using at least one safety domain (SD) PMIC; powering the at least one SD PMIC using a SD PMIC power supply rail; and monitoring the SD PMIC power supply rail using the at least one MD PMIC. For certain aspects, the method further includes powering the at least one MD PMIC using a MD PMIC power supply rail and monitoring the MD PMIC power supply rail using the at least one SD PMIC.

Abstract: Input images are partitioned into non-overlapping segments perpendicular to a disparity dimension of the input images. Each segment includes a contiguous region of pixels spanning from a first edge to a second edge of the image, with the two edges parallel to the disparity dimension. In some aspects, contiguous input image segments are assigned in a “round robin” manner to a set of sub-images. Each pair of input images generates a corresponding pair of sub-image sets. Semi-global matching processes are then performed on pairs of corresponding sub-images generated from each input image. The SGM processes may be run in parallel, reducing an elapsed time to generate respective disparity sub-maps. The disparity sub-maps are then combined to provide a single disparity map of equivalent size to the original two input images.

Abstract: The disclosure provides an approach for deploying an software defined networking (SDN) solution on a host using a single virtual switch and a single active network interface card (NIC) to handle overlay traffic and also other types of network traffic, such as traffic between management components of the logical overlay networks, traffic of a virtual storage area network (VSAN), traffic used to move VMs between hosts, traffic associated with VMKernel services or network stacks provided by a VMKernel that is provided as part of the hypervisor on the host, a gateway device that may be implemented as a VCI on the host, and different SDN-related components, such as an SDN manager implementing the MP and an SDN controller implementing the CP, etc.

Abstract: Various systems and methods for implementing distributed object detection processing are described herein. An object detection system includes a plurality of computer vision accelerators to process a respective plurality of portions of an input image and produce a list of detected objects in the respective plurality of portions of the input image; and a processor subsystem to: combine the list of detected objects from each of the plurality of computer vision accelerators, to produce a combined list of detected objects; sort the combined list of detected objects; and remove duplicate entries in the combined list of detected objects to produce an output list of detected objects.

Abstract: The disclosure provides an approach for deploying an software defined networking (SDN) solution on a host using a single virtual switch and a single active network interface card (NIC) to handle overlay traffic and also other types of network traffic, such as traffic between management components of the logical overlay networks, traffic of a virtual storage area network (VSAN), traffic used to move VMs between hosts, traffic associated with VMKernel services or network stacks provided by a VMKernel that is provided as part of the hypervisor on the host, a gateway device that may be implemented as a VCI on the host, and different SDN-related components, such as an SDN manager implementing the MP and an SDN controller implementing the CP, etc.

Abstract: A system for managing memory resources related to boot, including a memory; a boot configuration circuit, configured to designate one or more memory regions as a first type or a second type, the first type requiring scrubbing before beginning system operation, and the second type permitting scrubbing after beginning system operation; one or more processors, configured to scrub the memory regions of the first type; define a first caching policy of one or more memory regions of the second type; and begin system operation before scrubbing memory regions of the second type.

Abstract: Input images are partitioned into non-overlapping segments perpendicular to a disparity dimension of the input images. Each segment includes a contiguous region of pixels spanning from a first edge to a second edge of the image, with the two edges parallel to the disparity dimension. In some aspects, contiguous input image segments are assigned in a “round robin” manner to a set of sub-images. Each pair of input images generates a corresponding pair of sub-image sets. Semi-global matching processes are then performed on pairs of corresponding sub-images generated from each input image. The SGM processes may be run in parallel, reducing an elapsed time to generate respective disparity sub-maps. The disparity sub-maps are then combined to provide a single disparity map of equivalent size to the original two input images.

Abstract: Technologies for an advanced driver assist system (ADAS) with adaptive memory pre-training include a computing device and a safety microcontroller in communication with a serial link and a general-purpose I/O (GPIO) link. Out of reset, the computing device determines whether a full memory training signal is raised via the GPIO link. If not raised, the computing device executes a fast boot path to initialize a memory controller with a pre-trained memory parameter data set and performs margin tests to check the validity of the pre-trained memory parameter data set. If the full memory training signal is raised, the computing device executes a slow boot path to generate the pre-trained memory parameter data set. The safety microcontroller may receive a message requesting full memory training via the serial link and, in response, hold the computing device in reset and raise the full memory training signal. Other embodiments are described and claimed.

Abstract: Herein is disclosed a memory management system comprising a memory; a boot configuration circuit, configured to designate one or more memory regions as a first type or a second type, the first type requiring scrubbing before beginning system operation, and the second type permitting scrubbing after beginning system operation; one or more processors, configured to scrub the memory regions of the first type; define a first caching policy of one or more memory regions of the second type; and begin system operation before scrubbing memory regions of the second type.

Abstract: Various systems and methods for implementing distributed object detection processing are described herein. An object detection system includes a plurality of computer vision accelerators to process a respective plurality of portions of an input image and produce a list of detected objects in the respective plurality of portions of the input image; and a processor subsystem to: combine the list of detected objects from each of the plurality of computer vision accelerators, to produce a combined list of detected objects; sort the combined list of detected objects; and remove duplicate entries in the combined list of detected objects to produce an output list of detected objects.

Abstract: In one example a system to manage software updates for one or more devices on a vehicle comprises a communication interface to receive one or more software updates for the one or more devices on the vehicle, and a controller communicatively coupled to one or more devices and comprising processing circuitry to receive one or more software updates for at least one of the one or more devices, start a software update process for at least one of the one or more devices, detect a fault condition that corrupted the software update process, and in response to the fault condition, to implement a software update process fault protocol. Other examples may be described.