Patents by Inventor Amit Bleiweiss
Amit Bleiweiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190205737Abstract: An apparatus to facilitate acceleration of machine learning operations is disclosed. The apparatus comprises at least one processor to perform operations to implement a neural network and accelerator logic to perform communicatively coupled to the processor to perform compute operations for the neural network.Type: ApplicationFiled: December 30, 2017Publication date: July 4, 2019Applicant: Intel CorporationInventors: Amit Bleiweiss, Anavai Ramesh, Asit Mishra, Deborah Marr, Jeffrey Cook, Srinivas Sridharan, Eriko Nurvitadhi, Elmoustapha Ould-Ahmed-Vall, Dheevatsa Mudigere, Mohammad Ashraf Bhuiyan, Md Faijul Amin, Wei Wang, Dhawal Srivastava, Niharika Maheshwari
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Publication number: 20190205736Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a at least one processor to perform operations to implement a neural network and compute logic to accelerate neural network computations.Type: ApplicationFiled: December 29, 2017Publication date: July 4, 2019Applicant: Intel CorporationInventors: Amit Bleiweiss, Abhishek Venkatesh, Gokce Keskin, John Gierach, Oguz Elibol, Tomer Bar-On, Huma Abidi, Devan Burke, Jaikrishnan Menon, Eriko Nurvitadhi, Pruthvi Gowda Thorehosur Appajigowda, Travis T. Schluessler, Dhawal Srivastava, Nishant Patel, Anil Thomas
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Publication number: 20190205746Abstract: An apparatus to facilitate processing of a sparse matrix for arbitrary graph data is disclosed. The apparatus includes a graphics processing unit having a data management unit (DMU) that includes a scheduler for scheduling matrix operations, an active logic for tracking active input operands, and a skip logic for tracking unimportant input operands to be skipped by the scheduler. Processing circuitry is coupled to the DMU. The processing circuitry comprises a plurality of processing elements including logic to read operands and a multiplication unit to multiply two or more operands for the arbitrary graph data.Type: ApplicationFiled: December 29, 2017Publication date: July 4, 2019Applicant: Intel CorporationInventors: Eriko Nurvitadhi, Amit Bleiweiss, Deborah Marr, Eugene Wang, Saritha Dwarakapuram, Sabareesh Ganapathy
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Publication number: 20190082164Abstract: An activity recording system is provided. The activity recording system includes a three-dimensional camera, a sensor arrangement that is fitted to a subject being recorded, and an activity recording device. The activity recording device receives image information from the three-dimensional camera and sensor arrangement information from the sensor arrangement. Both the image information and the sensor arrangement information include location measurements. The sensor arrangement information is generated by location sensors that are positioned at target features of the subject to be tracked. The sensor arrangement information is a key to the image information that specifies where, in any given image, the target features of the subject lie. Activity data having these characteristics may be applied to solve a variety of system development problems. Such activity data can be used to training machine learning components or test computer vision components for a fraction of the cost of using conventional techniques.Type: ApplicationFiled: November 9, 2018Publication date: March 14, 2019Applicant: INTEL CORPORATIONInventor: Amit Bleiweiss
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Publication number: 20180357834Abstract: Techniques are provided for generation of synthetic 3-dimensional object image variations for training of recognition systems. An example system may include an image synthesizing circuit configured to synthesize a 3D image of the object (including color and depth image pairs) based on a 3D model. The system may also include a background scene generator circuit configured to generate a background for each of the rendered image variations. The system may further include an image pose adjustment circuit configured to adjust the orientation and translation of the object for each of the variations. The system may further include an illumination and visual effect adjustment circuit configured to adjust illumination of the object and the background for each of the variations, and to further adjust visual effects of the object and the background for each of the variations based on application of simulated camera parameters.Type: ApplicationFiled: August 2, 2018Publication date: December 13, 2018Applicant: INTEL CORPORATIONInventors: Amit Bleiweiss, Chen Paz, Ofir Levy, Itamar Ben-Ari, Yaron Yanai
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Patent number: 10129530Abstract: An activity recording system is provided. The activity recording system includes a three-dimensional camera, a sensor arrangement that is fitted to a subject being recorded, and an activity recording device. The activity recording device receives image information from the three-dimensional camera and sensor arrangement information from the sensor arrangement. Both the image information and the sensor arrangement information include location measurements. The sensor arrangement information is generated by location sensors that are positioned at target features of the subject to be tracked. The sensor arrangement information is a key to the image information that specifies where, in any given image, the target features of the subject lie. Activity data having these characteristics may be applied to solve a variety of system development problems. Such activity data can be used to training machine learning components or test computer vision components for a fraction of the cost of using conventional techniques.Type: GrantFiled: September 25, 2015Date of Patent: November 13, 2018Assignee: INTEL CORPORATIONInventor: Amit Bleiweiss
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Publication number: 20180314931Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Uzi Sarel, Ehud Cohen, Tomer Schwartz, Amitai Armon, Yahav Shadmiy, Amit Bleiweiss, Gal Leibovich, Jeremie Dreyfuss, Lev Faivishevsky, Tomer Bar-On, Yaniv Fais, Jacob Subag
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Publication number: 20180314933Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to implement training of a deep tree application at a data center. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Amit Bleiweiss, Lev Faivishevsky, Tomer Schwartz, Yaniv Fais, Jacob Subag
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Publication number: 20180314932Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to generate synthetic data for a generative adversarial network (GAN) using the plurality of execution units. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Tomer Schwartz, Ehud Cohen, Uzi Sarel, Amitai Armon, Yaniv Fais, Lev Faivishevsky, Amit Bleiweiss, Yahav Shadmiy, Jacob Subag
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Publication number: 20180314492Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Yaniv Fais, Tomer Bar-On, Jacob Subag, Jeremie Dreyfuss, Lev Faivishevsky, Michael Behar, Amit Bleiweiss, Guy Jacob, Gal Leibovich, Itamar Ben-Ari, Galina Ryvchin, Eyal Yaacoby
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Publication number: 20180314926Abstract: A mechanism is described for facilitating memory handling and data management in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting multiple tables associated with multiple neural networks at multiple autonomous machines, where each of the multiple tables include an index. The method may further include combining the multiple tables and multiple indexes associated with the multiple tables into a single table and a single index, respectively, where the single table is communicated to the multiple autonomous machines to allow simultaneous processing of one or more portions of the single table using one or more memory devices and one or more processors of one or more of the multiple autonomous machines.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Tomer Schwartz, Ehud Cohen, Uzi Sarel, Amitai Armon, Yaniv Fais, Lev Faivishevsky, Amit Bleiweiss, Yahav Shadmiy, Jacob Subag
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Publication number: 20180314899Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Applicant: Intel CorporationInventors: Jeremie Dreyfuss, Amit Bleiweiss, Lev Faivishevsky, Tomer Bar-On, Yaniv Fais, Jacob Subag, Eran Ben-Avi, Neta Zmora, Tomer Schwartz
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Publication number: 20180307982Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 24, 2017Publication date: October 25, 2018Applicant: Intel CorporationInventors: Lev Faivishevsky, Tomer Bar-On, Yaniv Fais, Jacob Subag, Jeremie Dreyfuss, Amit Bleiweiss, Tomer Schwartz
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Publication number: 20180307987Abstract: In an example, an apparatus comprises at least one execution platform; and logic, at least partially including hardware logic, to receive a trained neural network model in a model optimizer and convert the trained neural network model to an optimized model comprising parameters that are fit to the at least one execution platform. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 24, 2017Publication date: October 25, 2018Applicant: Intel CorporationInventors: Amit Bleiweiss, Itamar Ben-Ari, Michael Behar, Guy Jacob, Gal Leibovich, Jacob Subag, Lev Faivishevsky, Yaniv Fais, Tomer Schwartz
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Publication number: 20180293777Abstract: In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: April 8, 2017Publication date: October 11, 2018Applicant: Intel CorporationInventors: Uzi Sarel, Ehud Cohen, Tomer Schwartz, Amitai Armon, Yahav Shadmiy, Itamar Ben-Ari, Amit Bleiweiss, Lev Faivishevsky, Tomer Bar-On, Yaniv Fais, Jacob Subag, Michael Behar, Guy Jacob, Gal Leibovich, Jeremie Dreyfuss
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Patent number: 10068385Abstract: Techniques are provided for generation of synthetic 3-dimensional object image variations for training of recognition systems. An example system may include an image synthesizing circuit configured to synthesize a 3D image of the object (including color and depth image pairs) based on a 3D model. The system may also include a background scene generator circuit configured to generate a background for each of the rendered image variations. The system may further include an image pose adjustment circuit configured to adjust the orientation and translation of the object for each of the variations. The system may further include an illumination and visual effect adjustment circuit configured to adjust illumination of the object and the background for each of the variations, and to further adjust visual effects of the object and the background for each of the variations based on application of simulated camera parameters.Type: GrantFiled: December 15, 2015Date of Patent: September 4, 2018Assignee: Intel CorporationInventors: Amit Bleiweiss, Chen Paz, Ofir Levy, Itamar Ben-Ari, Yaron Yanai
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Publication number: 20180089519Abstract: Various systems and methods for providing a mechanism for multi-modal user authentication are described herein. An authentication system for multi-modal user authentication includes a memory including image data captured by a camera array, the image data including a hand of a user; and an image processor to: determine a hand geometry of the hand based on the image data; determine a palm print of the hand based on the image data; determine a gesture performed by the hand based on the image data; and determine a bio-behavioral movement sequence performed by the hand based on the image data; and an authentication module to construct a user biometric template using the hand geometry, palm print, gesture, and bio-behavioral movement sequence.Type: ApplicationFiled: September 26, 2016Publication date: March 29, 2018Inventors: Michael Raziel, Alex Nayshtut, Oleg Pogorelik, Amit Bleiweiss, Eliyahu Elhadad
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Patent number: 9928605Abstract: Various systems and methods for real-time cascaded object recognition are described herein. A system for real-time cascaded object recognition comprises a processor; and a memory, including instructions, which when executed on the processor, cause the processor to perform the operations comprising: accessing image data at the system, the image data of an environment around the system, the image data is captured by a camera system; determining a set of regions in the image data, the set of regions including candidate objects; transmitting a subset of the image data corresponding to the set of regions to a remote server, the remote server to analyze the subset of the image data and detect an object in the subset of the image data; and receiving at the system from the remote server, an indication of the object detected in the subset of the image data.Type: GrantFiled: September 25, 2015Date of Patent: March 27, 2018Assignee: Intel CorporationInventors: Amit Bleiweiss, Yaron Yanai, Yinon Oshrat, Amir Rosenberger
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Patent number: 9910498Abstract: A system and method for close range object tracking are described. Close range depth images of a user's hands and fingers or other objects are acquired using a depth sensor. Using depth image data obtained from the depth sensor, movements of the user's hands and fingers or other objects are identified and tracked, thus permitting the user to interact with an object displayed on a screen, by using the positions and movements of his hands and fingers or other objects.Type: GrantFiled: June 25, 2012Date of Patent: March 6, 2018Assignee: INTEL CORPORATIONInventors: Gershom Kutliroff, Yaron Yanai, Amit Bleiweiss, Shahar Fleishman, Yotam Livny, Jonathan Epstein
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Patent number: 9898688Abstract: Methods, apparatuses and systems may provide for a neural network that analyzes and classifies agricultural conditions based on depth data and color data recorded by one or more drones, and generates an annotated three dimensional (3D) map with the agricultural conditions. Additionally, an object recognition model may be trained for use by a drone controller to trigger drones to conduct a collection of depth data at an increased proximity to crop-related objects based on agricultural conditions.Type: GrantFiled: June 1, 2016Date of Patent: February 20, 2018Assignee: Intel CorporationInventor: Amit Bleiweiss