Abstract: The disclosure describes techniques that enable detection of memory leaks of software executing on devices within a computer network. An example network device includes memory and processing circuitry. The processing circuitry monitors a usage of the memory by a software component operating within the network device. The processing circuitry periodically determines a memory growth pattern score for the software component based on the usage of the memory. The processing circuitry also predicts whether the user-level process is experiencing a memory leak based on the memory growth pattern score. The processing circuitry applies confirmation criteria to current memory usage of the software component to confirm that the software component is experiencing the memory leak. When the software component is experiencing the memory leak, the processing circuitry generates an alert.

Abstract: Illustrative systems and methods enable a virtual machine (“VM”) to be powered up at any hypervisor regardless of hypervisor type, based on live-mounting VM data that was originally backed up into a hypervisor-independent format by a block-level backup operation. Afterwards, the backed up VM executes anywhere anytime without needing to find a hypervisor that is the same as or compatible with the original source VM's hypervisor. The backed up VM payload data is rendered portable to any virtualized platform. Thus, a VM can be powered up at one or more test stations, data center or cloud recovery environments, and/or backup appliances, without the prior-art limitations of finding a same/compatible hypervisor for accessing and using backed up VM data. An illustrative media agent maintains cache storage that acts as a way station for data blocks retrieved from an original backup copy, and stores data blocks written by the live-mounted VM.

Abstract: According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt.

Abstract: The present disclosure is directed to seamless access to a common physical disk in an AMP system without an external hypervisor, and includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations including instantiating, by a first instance, a second instance during a system upgrade, creating, in the first instance, a first disk abstraction for a block device of a physical disk, and attaching the block device under the first disk abstraction. The operations further include providing the second instance network-based access to the physical disk using the first disk abstraction of the first instance during the system upgrade.

Abstract: According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt.

Abstract: According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt.

Abstract: The present disclosure is directed to seamless access to a common physical disk in an AMP system without an external hypervisor, and includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations including instantiating, by a first instance, a second instance during a system upgrade, creating, in the first instance, a first disk abstraction for a block device of a physical disk, and attaching the block device under the first disk abstraction. The operations further include providing the second instance network-based access to the physical disk using the first disk abstraction of the first instance during the system upgrade.

Abstract: The present disclosure is directed to migrating logical volumes from a thick provisioned layout to a thin provisioned layout, and includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising creating an abstraction layer on top of a logical volume in a storage device, the abstraction layer for accessing the logical volume, the logical volume one of a plurality of logical volumes in a volume group of the storage device; allocating a thin pool from remaining storage space in the volume group of the storage device; creating a snapshot of the logical volume; adding a thin virtual volume corresponding to the logical volume to the thin pool; and copying data from the snapshot to the thin virtual volume.

Abstract: An intelligent data ingestion and governance method and system is disclosed. A set of data requirements is received from a user. The set of data requirements includes multiple different formats and corresponding location information indicating a plurality of corresponding different data sources. One or more data policies are also received from the user as part of the set of data requirements. A configuration file is automatically generated using the set of data requirements. A new dataset is retrieved from the plurality of corresponding different sources of data, using the generated configuration file. The retrieved dataset is classified, and metadata for the retrieved dataset is provided. Actionable policies are automatically generated using the metadata and the user defined data policies, and a compliance engine is generated. Security of access to the retrieved input data is controlled using the generated compliance engine.

Abstract: According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt.

Abstract: The present disclosure is directed to migrating logical volumes from a thick provisioned layout to a thin provisioned layout, and includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components of the system to perform operations comprising creating an abstraction layer on top of a logical volume in a storage device, the abstraction layer for accessing the logical volume, the logical volume one of a plurality of logical volumes in a volume group of the storage device; allocating a thin pool from remaining storage space in the volume group of the storage device; creating a snapshot of the logical volume; adding a thin virtual volume corresponding to the logical volume to the thin pool; and copying data from the snapshot to the thin virtual volume.

Abstract: The present disclosure is directed to an in-memory communication infrastructure for an asymmetric multiprocessing system without an external hypervisor, and includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including identifying data for transmission from a first instance to a second instance, writing, by the first instance, the data into a first ring of a shared memory, the first ring configured as a first transmit ring for the first instance, sending an inter-processor interrupt to the second instance to alert the second instance of the data written into the first ring, reading, by the second instance, the data from the first ring, the first ring configured as a first receive ring for the second instance, and transmitting the data to an application of the second instance.

Abstract: An intelligent data ingestion and governance method and system is disclosed. A set of data requirements is received from a user. The set of data requirements includes multiple different formats and corresponding location information indicating a plurality of corresponding different data sources. One or more data policies are also received from the user as part of the set of data requirements. A configuration file is automatically generated using the set of data requirements. A new dataset is retrieved from the plurality of corresponding different sources of data, using the generated configuration file. The retrieved dataset is classified, and metadata for the retrieved dataset is provided. Actionable policies are automatically generated using the metadata and the user defined data policies, and a compliance engine is generated. Security of access to the retrieved input data is controlled using the generated compliance engine.

Abstract: In one embodiment, a stack manager of an operating system on a network device configures an egress abstract stack port and an ingress abstract stack port, where the configuring maps one or more physical ports of the network device to a corresponding abstract stack port. The stack manager then transmits platform-independent egress stack discovery messages on the egress abstract port to a remote ingress abstract stack port of an adjacent stack member, and receives platform-independent ingress stack discovery messages on the ingress abstract port from a remote egress abstract stack port of an adjacent stack member. The stack manager may then provide platform-independent stacked network device operation using connectivity between the egress abstract stack port and remote ingress abstract stack port, and connectivity between the remote egress abstract stack port and ingress abstract stack port.

Abstract: Sodium salt of (2S,5R)-6-benzyloxy-7-oxo-1,6-diaza-bicyclo[3.2.1]octane-2-carboxylic acid and a process for its preparation is disclosed.

Abstract: A process for preparation of (2S,5R)-7-oxo-6-sulphooxy-2-[((3R)-pyrrolidine-3-carbonyl)-hydrazino carbonyl]-1,6-diaza-bicyclo[3.2.1]octane is disclosed comprising reacting a compound of Formula (II) with a compound of Formula (III) to obtain a compound of Formula (IV). The crystalline end-product is als claimed.

Abstract: In an embodiment, a methodology for designing an integrated circuit that attempts to improve power efficiency is provided. The methodology includes simulating the design under one or more power stimuli, where the power stimuli are known to cause high power consumption (e.g. in previous designs of the integrated circuit, the power stimuli may have caused power consumption). A set of nets within the integrated circuit may be identified that have the highest activity in the simulation (e.g. the highest amount of switching). The methodology may include providing data to the routing tool that is to route the nets in the integrated circuit. The data may indicate constraints for the set of nets, to help reduce dynamic power on these nets. Power efficiency of the integrated circuit may be improved if the routing tool is able to honor the constraints.

Abstract: In an embodiment, a methodology for designing an integrated circuit that attempts to improve power efficiency is provided. The methodology includes simulating the design under one or more power stimuli, where the power stimuli are known to cause high power consumption (e.g. in previous designs of the integrated circuit, the power stimuli may have caused power consumption). A set of nets within the integrated circuit may be identified that have the highest activity in the simulation (e.g. the highest amount of switching). The methodology may include providing data to the routing tool that is to route the nets in the integrated circuit. The data may indicate constraints for the set of nets, to help reduce dynamic power on these nets. Power efficiency of the integrated circuit may be improved if the routing tool is able to honor the constraints.

Abstract: Sodium salt of (2S,5R)-6-benzyloxy-7-oxo-1,6-diaza-bicyclo[3.2.1]octane-2-carboxylic acid and a process for its preparation is disclosed.

Abstract: A process for preparation of (2S,5R)-7-oxo-6-sulphooxy-2-[((3R)-pyrrolidine-3-carbonyl)-hydrazino carbonyl]-1,6-diaza-bicyclo[3.2.1]octane is disclosed comprising reacting a compound of Formula (II) with a compound of Formula (III) to obtain a compound of Formula (IV). The crystalline end-product is als claimed.