Patents by Inventor Amit Katyal

Amit Katyal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126868
    Abstract: A cloud-based platform for zero trust network access (ZTNA) services provides zero trust network access as a service for multiple customers in a multi-tenant architecture. In this context, the configuration for a new ZTNA application is validated with a service proxy in a sandbox or similar environment before release by the cloud-based platform for access through a public network. As a significant advantage, this approach mitigates inadvertent conflicts or instability in a service proxy that supports other applications and customers.
    Type: Application
    Filed: December 28, 2022
    Publication date: April 18, 2024
    Inventors: Robert Paul Andrews, Amit Katyal, Thiyagu Rajendran
  • Publication number: 20240129278
    Abstract: A cloud computing platform provides zero trust network access as a service to customers that maintain applications on-premises, and a zero trust network access appliance at the customer premises that couples the on-premises applications to the cloud computing platform. A customer may host multiple instances of the appliance in order to support scalable access, where each instance creates a separate secure tunnel to the cloud computing platform. In this context, when a new appliance authenticates a new secure tunnel, information such as a connector name, customer, and port for the tunnel may be shared on a control plane for the computing platform to facilitate programmatic load balancing within the cloud computing platform.
    Type: Application
    Filed: December 28, 2022
    Publication date: April 18, 2024
    Inventors: Robert Paul Andrews, Venkata Suresh Reddy Obulareddy, Amit Katyal, Thiyagu Rajendran
  • Publication number: 20240129310
    Abstract: A zero trust network access appliance deployed at a customer premises can support gateway and cloud modes. In a gateway mode, the appliance operates as a zero trust network access gateway, and provides zero trust network access to applications hosted at the customer premises, using a firewall at the customer premises for network security. In the cloud mode, the appliance initiates a secure connection with a remote, cloud computing platform that provides a front end for zero trust network access. A threat management facility for the customer provides a control plane for managing zero trust network access provided through the cloud computing platform.
    Type: Application
    Filed: December 28, 2022
    Publication date: April 18, 2024
    Inventors: Robert Paul Andrews, Biju Ramachandra Kaimal, Nitin Gupta, Amit Katyal
  • Patent number: 11956124
    Abstract: In one or more embodiments, an apparatus includes one or more memories and one or more processors operatively coupled to the one or more memories. The one or more processors is configured to receive a policy bundle associated with at least one tenant from a plurality of tenants, determine a policy change associated with a change between the policy bundle and a tenant policy, the policy change associated with a load value, subscribe an administration client to an administration layer server based on the tenant policy, transmit the policy change to the administration layer client, implement the policy change into an agent associated with the administration layer client, determine a system load status based on a plurality of administration layer clients and the load value, and responsive to determining the system load status exceeds a predetermined threshold, generate at least one agent associated with the at least one tenant.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Sophos Limited
    Inventors: Prashil Rakeshkumar Gupta, Amit Katyal
  • Publication number: 20230308433
    Abstract: A Transport Layer Security (TLS) handshake can be terminated early—i.e., before certificate validation—to reduce server-side demand, which can be particularly advantageous in counteracting Denial-of-Service (DOS) attacks and the like. To this end, an endpoint may provide a one-time password (OTP) in the client hello message during the initial steps of a TLS handshake or similar connection protocol. A gateway, upon receiving the client hello message, may generate its own OTP for comparison with the OTP in the client hello message. The endpoint and gateway may advantageously generate the OTP based on a secret provided by a threat management facility with a preexisting secure connection to the two entities. If the OTP provided in the client hello message and the OTP generated on the gateway are the same, then the TLS handshake may continue; otherwise, the Transmission Control Protocol (TCP) connection will be terminated by the gateway.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Amit Katyal, Venkata Suresh Reddy Obulareddy
  • Publication number: 20230120522
    Abstract: In a cluster of network devices using a consensus protocol for cluster synchronization, a full software rollback is performed by backing up a cluster state on a primary instance for the cluster, and then restarting all devices at the same time from a prior partition. The primary instance can then start a cluster management service and other devices can join the cluster using the consensus state stored by the primary instance.
    Type: Application
    Filed: March 9, 2022
    Publication date: April 20, 2023
    Inventors: Nikhil Bhandari, Venkata Suresh Reddy Obulareddy, Amit Katyal
  • Patent number: 10876772
    Abstract: A distillation system and process thereof are provided. The system includes an evaporation vessel having a system for heating a liquid contained therein and producing vapours thereof and a condensation vessel having a system for cooling and condensing the vapours produced in the evaporation vessel. A connecting pipe for connecting the evaporation vessel and the condensation vessel transfers the vapours from the evaporation vessel to the condensation vessel. The amount of vapours transferred from the evaporation vessel to the condensation vessel depends upon the pressure differential between the evaporation vessel and the condensation vessel and area of opening of the connecting pipe.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: December 29, 2020
    Inventor: Amit Katyal
  • Patent number: 9991896
    Abstract: A magnitude difference between intrinsic positive and negative current components forming a PLL's charge pump output current is determined by simultaneously outputting the intrinsic positive and negative pump current components, and incrementally increasing a bias current added to one of the intrinsic current components (e.g., such that the total positive current component is gradually increased). Calibration control voltages generated by the calibration pump output current are measured to determine when magnitudes of the adjusted (e.g., positive) current component and the non-adjusted/intrinsic (e.g., negative) current component are equal, and the bias current amount required to achieve equalization is stored as a digital converter code. During subsequent normal PLL operations, the digital converter code is utilized to control the charge pump such that the magnitude of the positive current component is adjusted by the bias current amount such that the positive and negative current components are matched.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: June 5, 2018
    Assignee: Synopsys, Inc.
    Inventor: Amit Katyal
  • Publication number: 20180106511
    Abstract: A distillation system and process thereof are provided. The system includes an evaporation vessel having a system for heating a liquid contained therein and producing vapours thereof and a condensation vessel having a system for cooling and condensing the vapours produced in the evaporation vessel. A connecting pipe for connecting the evaporation vessel and the condensation vessel transfers the vapours from the evaporation vessel to the condensation vessel. The amount of vapours transferred from the evaporation vessel to the condensation vessel depends upon the pressure differential between the evaporation vessel and the condensation vessel and area of opening of the connecting pipe.
    Type: Application
    Filed: April 13, 2016
    Publication date: April 19, 2018
    Inventor: Amit KATYAL
  • Publication number: 20180048322
    Abstract: A magnitude difference between intrinsic positive and negative current components forming a PLL's charge pump output current is determined by simultaneously outputting the intrinsic positive and negative pump current components, and incrementally increasing a bias current added to one of the intrinsic current components (e.g., such that the total positive current component is gradually increased). Calibration control voltages generated by the calibration pump output current are measured to determine when magnitudes of the adjusted (e.g., positive) current component and the non-adjusted/intrinsic (e.g., negative) current component are equal, and the bias current amount required to achieve equalization is stored as a digital converter code. During subsequent normal PLL operations, the digital converter code is utilized to control the charge pump such that the magnitude of the positive current component is adjusted by the bias current amount such that the positive and negative current components are matched.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 15, 2018
    Inventor: Amit Katyal
  • Patent number: 9855515
    Abstract: The present invention discloses a horizontal multi-stage distillation system. The system comprises a feed stream, a distillate stream, a residue stream, a group of vessels, a plurality of vapor non-return valves (NRVs), a plurality of plurality of pumps, a plurality of liquid recycle NRVs, a liquid stream, a vapor stream, a plurality of liquid recycle streams, a plurality of level transmitters, a plurality of flow control valves (FCVs) and a plurality of liquid non-return valves (NRVs). Each vessel is connected to the adjacent vessel. The group of vessels comprises a condenser vessel, a reboiler vessel, a feed vessel, at-least one rectification vessel and at-least one stripping vessel. The present invention provides a horizontal multi-stage distillation system with higher efficiency and operational flexibility compared with equivalent vertical distillation columns. The present invention also avoids the interstage backflow of the liquid and vapors.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: January 2, 2018
    Inventor: Amit Katyal
  • Patent number: 9643860
    Abstract: The present invention relates to systems and methods for desalinating and/or treating polluted water. More particularly, the present invention relates to systems and methods for desalinating and/or treating polluted water using gas hydrates. In particular, the system comprises a desalination tank configured to form gas hydrates using a suitable hydrate former taken from a storage tank that is operatively connected to the desalination tank. With all operations, including formation of gas hydrates, discharging of highly saline water, washing the gas hydrates and dissociation of gas hydrates being conducted in a single pressurized tank such as the desalination tank, the present apparatus provides a simple and efficient solution at a low manufacturing and operating cost.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: May 9, 2017
    Inventor: Amit Katyal
  • Patent number: 9401699
    Abstract: A phase locked loop includes a voltage-controlled oscillator and a current mirror circuit that supplies a drive current to the voltage-controlled oscillator. The current mirror circuit includes a filter between a bias current generator and current mirror transistor. The filter includes a first and a second switch driven in unison with a small duty cycle.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: July 26, 2016
    Assignee: STMicroelectronics International N.V.
    Inventor: Amit Katyal
  • Patent number: 9337851
    Abstract: An electronic circuit is described in which a charge pump-based digital phase locked loop circuit is augmented with additional circuitry to monitor and control noise and power consumption. The additional circuitry includes a comparator and a measurement stage configured to measure and adjust a unity gain bandwidth of the phase locked loop. In one embodiment, the measurement stage includes two frequency-to-current converters and associated current mirrors.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: May 10, 2016
    Assignee: STMicroelectronics International N.V.
    Inventor: Amit Katyal
  • Publication number: 20150358025
    Abstract: An electronic circuit is described in which a charge pump-based digital phase locked loop circuit is augmented with additional circuitry to monitor and control noise and power consumption. The additional circuitry includes a comparator and a measurement stage configured to measure and adjust a unity gain bandwidth of the phase locked loop. In one embodiment, the measurement stage includes two frequency-to-current converters and associated current mirrors.
    Type: Application
    Filed: June 9, 2015
    Publication date: December 10, 2015
    Inventor: Amit Katyal
  • Publication number: 20150145608
    Abstract: A phase locked loop includes a voltage-controlled oscillator and a current mirror circuit that supplies a drive current to the voltage-controlled oscillator. The current mirror circuit includes a filter between a bias current generator and current mirror transistor. The filter includes a first and a second switch driven in unison with a small duty cycle.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: STMicroelectronics International N.V.
    Inventor: Amit Katyal
  • Patent number: 9018046
    Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell coupled between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size portion of said device is coupled to said I/O rails for distributing portions of said device on the periphery of said chip. The device is coupled as small size portion on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 28, 2015
    Assignees: STMicroelectronics International N.V., STMicroelectronics S.r.l.
    Inventors: Joshipura Jwalant, Nitin Bansal, Amit Katyal, Massimiliano Picca
  • Publication number: 20150001038
    Abstract: The present invention discloses a horizontal multi-stage distillation system. The system comprises a feed stream, a distillate stream, a residue stream, a group of vessels, a plurality of vapour non-return valves (NRVs), a plurality of plurality of pumps, a plurality of liquid recycle NRVs, a liquid stream, a vapour stream, a plurality of liquid recycle streams, a plurality of level transmitters, a plurality of flow control valves (FCVs) and a plurality of liquid non-return valves (NRVs). Each vessel is connected to the adjacent vessel. The group of vessels comprises a condenser vessel, a reboiler vessel, a feed vessel, at-least one rectification vessel and at-least one stripping vessel. The present invention provides a horizontal multi-stage distillation system with higher efficiency and operational flexibility compared with equivalent vertical distillation columns. The present invention also avoids the interstage backflow of the liquid and vapours.
    Type: Application
    Filed: January 7, 2013
    Publication date: January 1, 2015
    Inventor: Amit Katyal
  • Patent number: 8854095
    Abstract: A phase lock loop (PLL) circuit incorporates switched capacitive circuitry and feedback circuitry to reduce the time to achieve a lock condition. During a first mode, the frequency of a voltage controlled oscillator (VCO) is used to adjust the control voltage of the VCO to achieve a coarse lock condition. During a second mode, a reference frequency is used to control a charge pump to more precisely adjust the control voltage to achieve fine lock of the PLL. Because the VCO frequency is significantly higher than the reference frequency, the control voltage is varied at a greater rate during the first mode. In some embodiments, the time to achieve lock may be further reduced by initializing the VCO control voltage to a particular voltage so as to reduce the difference between the control voltage at start-up and the control voltage at the beginning of the first mode during coarse lock.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: October 7, 2014
    Assignee: STMicroelectronics International N.V.
    Inventor: Amit Katyal
  • Publication number: 20140158635
    Abstract: The present invention relates to systems and methods for desalinating and/or treating polluted water. More particularly, the present invention relates to systems and methods for desalinating and/or treating polluted water using gas hydrates. In particular, the system comprises a desalination tank configured to form gas hydrates using a suitable hydrate former taken from a storage tank that is operatively connected to the desalination tank. With all operations, including formation of gas hydrates, discharging of highly saline water, washing the gas hydrates and dissociation of gas hydrates being conducted in a single pressurized tank such as the desalination tank, the present apparatus provides a simple and efficient solution at a low manufacturing and operating cost.
    Type: Application
    Filed: October 25, 2012
    Publication date: June 12, 2014
    Inventor: Amit Katyal