Abstract: A network interface device includes a bus interface that communicates over a bus with a host processor and memory, and a network interface that sends and receive data packets carrying data over a packet network. A protocol processor conveys the data between the network interface and the memory via the bus interface while performing protocol offload processing on the data packets in accordance with multiple different application flows. The bus interface queues the data for transmission over the bus in a plurality of queues that are respectively assigned to the different application flows, and transmits the data over the bus according to the queues.

Abstract: A network interface device includes a bus interface that communicates over a bus with a host processor and memory, and a network interface, including at least first and second physical ports, which are coupled to send and receive data packets carrying data over a packet network. A protocol processor includes a single transmit processing pipeline and a single receive processing pipeline, which are coupled between the bus interface and the network interface so as to convey the data between both of the first and second physical ports of the network interface and the memory via the bus interface while performing protocol offload processing on the data packets.

Abstract: A network interface device includes a bus interface that communicates over a bus with a host processor and memory, and a network interface that sends and receive data packets carrying data over a packet network. A protocol processor conveys the data between the network interface and the memory via the bus interface while performing protocol offload processing on the data packets in accordance with multiple different application flows. The bus interface queues the data for transmission over the bus in a plurality of queues that are respectively assigned to the different application flows, and transmits the data over the bus according to the queues.

Abstract: A method for communication includes inputting from a host processor to a network interface device a sequence of work requests indicative of operations to be carried out by the network interface device with respect to a plurality of the connections. The device looks ahead through the sequence in order to identify at least first and second operations that are to be carried out with respect to one of the connections in response to first and second work requests, respectively, wherein the second work request does not immediately follow the first work request in the sequence. The device loads the context data for the one of the connections from a host memory into a context cache, and performs at least the first and second operations sequentially while the context data are held in the cache.

Abstract: An off-load engine for processing a packet conveyed between a target and a network over a transport connection, the packet including a payload and a header. The engine includes a payload buffer, for holding data exchanged between the off-load engine, the network, and the target for inclusion in the payload, and a packet processor, for processing context of the transport connection. The engine also includes a context buffer, for holding the context processed by the packet processor, a memory access multiplexer, which is coupled to convey the data in the payload buffer and the context in the context buffer to and from a memory that stores both the data and the context, and an arbiter, which controls the multiplexer by arbitrating among payload requests to convey the data between the payload buffer and the memory and context requests to convey the context between the context buffer and the memory.

Abstract: Aspects of a system for transforming compressed video traffic to network-aware Ethernet traffic with A/V bridging capabilities and A/V bridging extensions may include a graphics processing unit (GPU) that may enable encapsulation of compressed video data within a Display Port protocol data unit (PDU). A LAN subsystem may enable encapsulation of the Display Port PDU within an encapsulating PDU. The LAN subsystem may enable determination of a traffic class designation associated with the encapsulating PDU. The LAN subsystem may enable transmission of the encapsulating PDU via a network based on the traffic class designation. The LAN subsystem may also enable the encapsulation of compressed video data within Ethernet frames. A computing device, which receives the Ethernet frames may de-compress the compressed video data and send the uncompressed video data, which may be encapsulated within one or more Display Port mini-packets, to a multimedia monitor.

Abstract: Aspects of a method and system for fault resilience in Audio/Video Bridging (AVB) aware Shortest Path Bridging (SPB) networks are provided. In this regard, a path cost, which may be based at least on AVB compatibility, may be determined for each network path discovered between a first network node and a second network node. Additionally, a plurality of network paths may be selected based on the determined path cost, and a plurality of network connections may be established over the selected plurality of network paths. Also, a plurality of data streams may be transmitted and/or received via the established network connections, wherein at least one of data streams comprises data that is redundant to a first data stream. Furthermore, a primary data stream may be conveyed via a first network connection and one or more redundant data streams may be conveyed via a second network connection.

Abstract: Methods and systems for docking a laptop with Ethernet A/V bridging to guarantee services are disclosed and may include interfacing a portable computing device with a docking station using an Ethernet interface, and utilizing audio/video (AV) bridging for communicating data between the portable computing device and one or more devices coupled to the docking station. AV bridging may be utilized based on latency requirements of the data communication. The interfacing may include directly coupling an Ethernet port of the docking station to an Ethernet port of the portable computing device. Alternatively, the interfacing may include coupling an Ethernet port of the docking station to an Ethernet port of the portable computing device via an Ethernet cable. The portable computing device may be powered via the Ethernet interface, and may utilize power over Ethernet protocol. The docking station may include a passive or active docking station.

Abstract: Aspects of a system for universal serial bus (USB) over ANV bridging and ANV bridging extensions may include a LAN subsystem that enables reception of signals from a peripheral device coupled to a computing device via a USB interface. The LAN subsystem may enable the generation of payload data based on the received signals. The LAN subsystem may enable transmission of the generated payload data via a network based on a traffic class designation. The generated payload data may be encapsulated within an outgoing PDU, which may include an Ethernet frame and/or an IP packet. The outgoing encapsulating PDU may contain the traffic class designation. The LAN subsystem may also generate a time stamp for the encapsulating PDU. The LAN subsystem may enable indication that the outgoing encapsulating PDU encapsulates the generated payload data based on one or more data type identifiers, which include an EtherType and an EtherTypeSubType.

Abstract: Aspects of a method and system for implementing redundancy for streaming data in audio video bridging networks are provided. Network resources may be reserved over a plurality of network paths. Reserved resources may be utilized for the transmission and/or reception of a corresponding plurality of data streams, wherein one or more of the streams may comprise redundant data. A plurality of data streams may be transmitted and/or received by a plurality of network interface hardware devices. Similarly, a plurality of data streams may be transmitted and/or received by a plurality of ports integrated into a single network interface hardware device. Each of the plurality of data streams may be assigned a unique identifier and the identifier of a first data stream may differ by one bit from an identifier of a data stream comprising data redundant to the first data stream.

Abstract: A method for data verification is provided. An input block of data is received together with a modulo-based input error detection code associated with the input block, the input block comprising a plurality of sub-blocks. A subset of the sub-blocks is selected to be included in an output block. An error correction term is determined based on the selected subset. The selected subset of the sub-blocks is concatenated together with the input error detection code and the error correction term to generate an output block for conveyance to a destination processor.

Abstract: Aspects of a method and system are provided for error detection for improving data integrity in protocol offloading. Aspects of the invention may enable receiving a block of data having a modulo-based input error detection code and an error correction term appended thereto, calculating an output error detection code of the block, combining the input error detection code and the error correction term to produce a modified error detection code, and comparing the calculated error detection code to the modified error detection code so as to detect an error in the block. The error correction term may be equal to a binary difference between the input error detection code and the output error detection code. The input error detection code and the error correction term may be combined by applying an XOR operation.

Abstract: Aspects of a high reliability system for transporting information across a network via a TCP tunnel are presented. The TCP tunnel may include a plurality of TCP connections that may be logically associated with a single TCP tunnel. At least a portion of the plurality of TCP connections may be associated with each of a plurality of different network interfaces. In a fault tolerant system, at least a current portion of a plurality of messages communicated via an RDMA connection may be transported by a current TCP connection associated with a current network interface located at a current RNIC. In the event of a subsequent failure in the current TCP connection a subsequent portion of the plurality of messages may be communicated via a subsequent TCP connection associated with a different network interface. The different network interface may be located at the current RNIC or at a subsequent RNIC.

Abstract: A method for error detection includes receiving a block of data that is divided into a plurality of sub-blocks having respective offsets within the block and processing the data in each of the sub-blocks so as to compute respective partial error detection codes for the sub-blocks. The partial error detection codes of the sub-blocks are modified responsive to the respective offsets, and the modified partial error detection codes are combined to determine a block error detection code for the block of data.

Abstract: Aspects of a system for transporting information via a communications system may include a processor that establishes, via a local NIC, a communication channel between the local NIC and a remote NIC via a network. The processor may receive a datagram message from one of a plurality of local endpoints, communicatively coupled to the local NIC, without a dedicated connection. A datagram message may be delivered to one of a plurality of remote endpoints communicatively coupled to a remote NIC. The processor may communicate a datagram message via the local NIC to one of a plurality of remote endpoints via a communication channel without establishing a dedicated connection between one of the plurality of local endpoints and one of the plurality of remote endpoints.

Abstract: Cache apparatus, including first and second cache memories, coupled to receive and hold context information from an external memory with respect to tasks, each task activated by one or more activating events, so that the context information is available for access by a processor in performing the tasks. The cache apparatus further includes a mapper, which is coupled to receive a classification of the tasks as fast and slow tasks. The mapper is adapted, upon receipt of one of the activating events for one of the fast tasks to be performed by the processor, to cause the context information with respect thereto to be received in the first cache memory, and upon receipt of one of the activating events for one of the slow tasks to be performed by the processor, to cause the context information with respect thereto to be received in the second cache memory.

Abstract: A method for data verification is provided. An input block of data is received together with a modulo-based input error detection code associated with the input block, the input block comprising a plurality of sub-blocks. A subset of the sub-blocks is selected to be included in an output block. An error correction term is determined based on the selected subset. The selected subset of the sub-blocks is concatenated together with the input error detection code and the error correction term to generate an output block for conveyance to a destination processor.

Abstract: An off-load engine for processing a packet conveyed between a target and a network over a transport connection, the packet including a payload and a header. The engine includes a payload buffer, for holding data exchanged between the off-load engine, the network, and the target for inclusion in the payload, and a packet processor, for processing context of the transport connection.

Abstract: A method for error detection includes receiving a block of data that is divided into a plurality of sub-blocks having respective offsets within the block and processing the data in each of the sub-blocks so as to compute respective partial error detection codes for the sub-blocks. The partial error detection codes of the sub-blocks are modified responsive to the respective offsets, and the modified partial error detection codes are combined to determine a block error detection code for the block of data.

Abstract: Cache apparatus, including first and second cache memories, coupled to receive and hold context information from an external memory with respect to tasks, each task activated by one or more activating events, so that the context information is available for access by a processor in performing the tasks. The cache apparatus further includes a mapper, which is coupled to receive a classification of the tasks as fast and slow tasks. The mapper is adapted, upon receipt of one of the activating events for one of the fast tasks to be performed by the processor, to cause the context information with respect thereto to be received in the first cache memory, and upon receipt of one of the activating events for one of the slow tasks to be performed by the processor, to cause the context information with respect thereto to be received in the second cache memory.