Abstract: Optical inspection systems and methods to detect the presence of oxide materials on bonding structures are disclosed. An optical inspection system may be integrated into a semiconductor processing tool including a plasma treatment module for removing oxide materials from bonding structures, and a bond chamber configured to bond bonding structures on a first device structure to bonding structures on a second device structure. A light source may direct light having a wavelength between 10-400 nm onto surfaces of the device structures containing the bonding structures, and a camera may obtain images of the surfaces illuminated by the light source. The images may be analyzed to detect the presence of oxide materials on the bonding structures. Accordingly, sufficient removal of oxide materials may be ensured before bonding of the device structures, which may lead to improved bond quality, increased yields, and better reliability of the bonded device structures.

Abstract: A bonding apparatus with a bonding head having vacuum channels and switchable channels, and the method of forming an integrated circuit package are provided. The bonding apparatus may include a vacuum pump, a blower, a controller communicatively coupled to the vacuum pump and the blower, and a bonding head. The bonding head may include a main body, a first vacuum channel in the main body, wherein the first vacuum channel is connected to the vacuum pump, and a first switchable channel in the main body, wherein the first switchable channel is connected to the vacuum pump and the blower.

Abstract: A die ejector may include an ejector cap, an ejector holder in the ejector cap, a plurality of ejector rods in the ejector holder, wherein the plurality of ejector rods are independently engaged, and a plurality of ejector pins on the plurality of ejector rods. A method of performing die pick-up may include placing a semiconductor die on a die ejector including a plurality of ejector rods and a plurality of ejector pins on the plurality of ejector rods, wherein the plurality of ejector rods are independently engaged, generating an ejector rod configuration so that the plurality of ejector pins have a configuration based on the semiconductor die, advancing the plurality of ejector rods based on the ejector rod configuration so that the plurality of ejector pins contact the semiconductor die, and lifting the semiconductor die off the plurality of ejector pins.

Abstract: A bonded assembly may be formed by providing a wafer comprising at least a first packaging substrate and a second packaging substrate in a low-oxygen ambient; performing a first plasma package-treatment process on the first semiconductor package in the low-oxygen ambient while performing a first substrate-treatment process on the first packaging substrate in a low-oxygen ambient having an oxygen partial pressure that is lower than 17 kPa; and performing a second plasma package-treatment process on the second semiconductor package while performing a second substrate-treatment process on the second packaging substrate and while bonding the first semiconductor package to the first packaging substrate.

Abstract: A die bonding tool includes a bond head having a moveable component. The moveable component may be moveable between an extended position in which a lower surface of the moveable component protrudes below a lower surface of the bond head and a retracted position in which the lower surface of the moveable component does not protrude below the lower surface of the bond head. The moveable component may be used to control a shape of a semiconductor die secured to the lower surface of the bond head during a process of bonding the semiconductor die to a substrate. Accordingly, void areas and other bonding defects may be avoided and the bond formed between the semiconductor die and the target substrate may be improved.

Abstract: A bonded assembly may be formed by: providing a substrate and a semiconductor chip in a low-oxygen ambient having an oxygen partial pressure that is lower than 17 kPa; disposing the semiconductor chip on the substrate; performing a plasma treatment process on a copper-containing surface of a chip bonding pad on the semiconductor chip in the low-oxygen ambient by directing a plasma jet to the chip bonding pad; and attaching a bonding wire to the semiconductor chip and to the substrate such that a first end of the bonding wire is attached to the copper-containing surface and a second end of the bonding wire is attached to a substrate bonding pad on the substrate.

Abstract: A bonded assembly may be formed by performing a chip plasma clean process on a semiconductor chip; generating at least one chip infrared image of a cleaned side of the semiconductor chip; measuring an average emissivity of at least one metallic region in the at least one chip infrared image; performing a subsequent processing step selected from a bonding step and an alternative processing step based on the measured average emissivity. The bonding step is performed if the measured average emissivity is less than a predetermined emissivity threshold value. The alternative processing step is performed if the measured average emissivity is greater than the predetermined emissivity threshold value. The alternative processing step may be selected from an additional clean step and an additional inspection step.

Abstract: An embodiment method of forming a hybrid bond between a first semiconductor device component and a second semiconductor device component may include forming the first semiconductor device component including a first electrical bonding structure formed within a first dielectric material; forming the second semiconductor device component including a second electrical bonding structure formed within a second dielectric material; placing the first semiconductor device component and the second semiconductor device component together such that the first electrical bonding structure is in contact with the second electrical bonding structure; performing a first annealing process that forms a direct metal-to-metal bond between the first electrical bonding structure and the second electrical bonding structure; and performing a second annealing process that forms a direct dielectric-to-dielectric bond between the first dielectric material and the second dielectric material.

Abstract: In an embodiment, a method that includes forming a first semiconductor structure including a first plurality of metal lines in a first dielectric stack; wherein a first upper layer of the first dielectric stack includes an inorganic bonding layer and a first copper containing contact pad to the first plurality of metal lines; and forming a second semiconductor structure including a second plurality of metal lines in a second dielectric stack, wherein a second upper layer of the second dielectric stack includes an organic bonding layer and a second copper containing contact pad. The method may further include contacting the first upper layer to the second upper layer with the first copper containing contact pad aligned to the second copper containing contact pad; and bonding the first semiconductor structure to the second semiconductor structure. In some embodiments, the inorganic bonding layer is bonded to the organic bonding layer.

Abstract: A bonded assembly may be formed by performing a chip plasma clean process on a semiconductor chip; generating at least one chip infrared image of a cleaned side of the semiconductor chip; measuring an average emissivity of at least one metallic region in the at least one chip infrared image; performing a subsequent processing step selected from a bonding step and an alternative processing step based on the measured average emissivity. The bonding step is performed if the measured average emissivity is less than a predetermined emissivity threshold value. The alternative processing step is performed if the measured average emissivity is greater than the predetermined emissivity threshold value. The alternative processing step may be selected from an additional clean step and an additional inspection step.

Abstract: Methods of fabricating semiconductor devices and resulting bonded structures. An embodiment method includes tilting a plasma nozzle to an angle with respect to a substrate. The method includes applying, with the plasma nozzle, an oxidation gas onto a first side of at least one substrate-side copper bump on the substrate, forming an oxidized copper sidewall on the first side of the substrate-side copper bump. The method includes bonding a semiconductor chip to the substrate using the substrate-side copper bump.

Abstract: A die bonding tool includes a bond head that secures a semiconductor die against a planar surface of the bond head, an actuator system that moves the bond head and the semiconductor die towards a surface of a target substrate, and at least one contact sensor configured to detect an initial contact between a first region of the semiconductor die and the surface of the target substrate, where in response to detecting the initial contact between the semiconductor die and the target substrate, the actuator tilts the planar surface of the bond head and the semiconductor die to bring a second region of the semiconductor die into contact with the surface of the target substrate and thereby provide improved contact between the semiconductor die and the target substrate and more effective bonding including instances where the planar surface of the bond head and the target substrate surface are not parallel.

Abstract: An embodiment method of forming a hybrid bond between a first semiconductor device component and a second semiconductor device component may include forming the first semiconductor device component including a first electrical bonding structure formed within a first dielectric material; forming the second semiconductor device component including a second electrical bonding structure formed within a second dielectric material; placing the first semiconductor device component and the second semiconductor device component together such that the first electrical bonding structure is in contact with the second electrical bonding structure; performing a first annealing process that forms a direct metal-to-metal bond between the first electrical bonding structure and the second electrical bonding structure; and performing a second annealing process that forms a direct dielectric-to-dielectric bond between the first dielectric material and the second dielectric material.

Abstract: Optical inspection systems and methods to detect the presence of oxide materials on bonding structures are disclosed. An optical inspection system may be integrated into a semiconductor processing tool including a plasma treatment module for removing oxide materials from bonding structures, and a bond chamber configured to bond bonding structures on a first device structure to bonding structures on a second device structure. A light source may direct light having a wavelength between 10-400 nm onto surfaces of the device structures containing the bonding structures, and a camera may obtain images of the surfaces illuminated by the light source. The images may be analyzed to detect the presence of oxide materials on the bonding structures. Accordingly, sufficient removal of oxide materials may be ensured before bonding of the device structures, which may lead to improved bond quality, increased yields, and better reliability of the bonded device structures.

Abstract: A die bonding tool includes a bond head that secures a semiconductor die against a planar surface of the bond head, an actuator system that moves the bond head and the semiconductor die towards a surface of a target substrate, and at least one contact sensor configured to detect an initial contact between a first region of the semiconductor die and the surface of the target substrate, where in response to detecting the initial contact between the semiconductor die and the target substrate, the actuator tilts the planar surface of the bond head and the semiconductor die to bring a second region of the semiconductor die into contact with the surface of the target substrate and thereby provide improved contact between the semiconductor die and the target substrate and more effective bonding including instances where the planar surface of the bond head and the target substrate surface are not parallel.

Abstract: A die ejector may include an ejector cap, an ejector holder in the ejector cap, a plurality of ejector rods in the ejector holder, wherein the plurality of ejector rods are independently engaged, and a plurality of ejector pins on the plurality of ejector rods. A method of performing die pick-up may include placing a semiconductor die on a die ejector including a plurality of ejector rods and a plurality of ejector pins on the plurality of ejector rods, wherein the plurality of ejector rods are independently engaged, generating an ejector rod configuration so that the plurality of ejector pins have a configuration based on the semiconductor die, advancing the plurality of ejector rods based on the ejector rod configuration so that the plurality of ejector pins contact the semiconductor die, and lifting the semiconductor die off the plurality of ejector pins.

Abstract: A method for forming a package structure is provided. The method includes deforming an upper package component on a surface of a bonding head by holding the upper package component with a plurality of vacuum holes along opposite edges of the bonding head, and a peak of the surface is located between the opposite edges of the bonding head. The method includes aligning the upper package component with a lower package component. The method includes pressing the upper package component onto the lower package component until an edge of the upper package component contacts an edge of the lower package component. The method includes releasing the upper package component from the bonding head.

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first package, wherein the first package comprises, a first package substrate, a first die over the first package substrate, a first mold layer over the first package substrate and around the first die, and a plurality of through mold interconnects (TMIs) through the first mold layer. The electronic package may further comprise a second package electrically coupled the first package by the TMIs, wherein the second package comprises a second package substrate, a second die over the second package substrate, and a solder resist over a surface of the second package substrate opposite from the second die. In an embodiment, the electronic package may also comprise a barrier between the first package and the second package.

Abstract: A processing apparatus for forming a package structure is provided. The processing apparatus includes a processing chamber for bonding a first package component and a second package component. The processing apparatus includes a bonding head that is disposed in the processing chamber for holding the second package component. The processing apparatus also includes a chuck table that is disposed in the processing chamber for holding the first package component. The bonding head has a bottom surface facing a top surface of the chuck table, and the bottom surface of the bonding head is a non-planar surface.