Patents by Inventor An-Chin Cheng

An-Chin Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240045618
    Abstract: A host system is coupled to a storage device and manages completion queues (CQs) for the storage device. The host system includes a host controller and memory that stores submission queues (SQs) and the CQs. The host controller fetches a command from a given SQ that corresponds to a target CQ. The host controller saves the command in an SQ internal buffer of the host controller, calculates an available capacity (AC) associated with the given SQ for the host system to store a response to the command from the storage device, and sends the command to the storage device when the available capacity is non-zero. The available capacity is calculated based on, at least in part, available slots in the target CQ.
    Type: Application
    Filed: May 24, 2023
    Publication date: February 8, 2024
    Inventors: Chin Chin Cheng, Chih-Chieh Chou, Tzu-Shiun Liu
  • Patent number: 11884603
    Abstract: The present invention utilizes a high-speed intensive mixer in a fluidizing-type, solid-phase, neutralization reactor to blend solid-state alkali hydroxide with any humic acid sources. The final product is a dry humic acid salt. The purpose of this innovative method is to eliminate a series of complicated unit operations commonly employed by the traditional process. These removed steps may include dissolving caustic soda, mixing in a paste-like formation, extrusion, granulation, drying, and grinding, etc. The invention contributes to a simplified flowsheet, resulting in sharply reduced equipment investment, plant space, and labor and energy costs. All of these factors coupled with increased productivity will drastically lower the overall production cost. Also, the reduction of dust pollution will greatly minimize the impact in environmental protection and safety issues.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: January 30, 2024
    Inventor: James Chin Cheng Yang
  • Patent number: 11889627
    Abstract: A display device includes a first substrate, a second substrate, a plurality of drive ICs and at least one flexible circuit board. The first substrate has a first region and a second region near to the first region. The second substrate is disposed on the first region and has a lateral side. The plurality of drive ICs are disposed on the second region and arranged along the lateral side. The at least one flexible circuit board is disposed on the second region and disposed correspondingly to the lateral side. Wherein in a top view of the display device, each of the plurality of drive ICs does not overlap with the at least one flexible circuit board in a direction perpendicular to an extending direction of the lateral side.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: January 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
  • Publication number: 20240023228
    Abstract: An LCD display module includes a polygon flexible printed circuit to produce a thinner display. The polygon flexible printed circuit connects a driver integrated circuit to a printed circuit board assembly and a glass substrate. The polygon flexible printed circuit has a narrow minor end connected to the glass substrate and a wider major end connected to the printed circuit board assembly. Because the polygon flexible printed circuit has different end widths, the polygon flexible printed circuit permits reduced spacing of electronic components in proximity of the narrower minor end. The LCD display module also includes a shielding can in physical communication with the printed circuit board assembly to reduce electromagnetic interference between the printed circuit board and the polygon flexible printed circuit.
    Type: Application
    Filed: August 16, 2022
    Publication date: January 18, 2024
    Inventors: Tsung-Chin Cheng, Chin-Chung Wu, Hong-Ji Huang
  • Publication number: 20240019741
    Abstract: An LCD display module uses an ingenious gradient flexible printed circuit to produce a larger and thinner display. The gradient flexible printed circuit connects a driver integrated circuit between a printed circuit board assembly and an ITO circuit on a glass substrate. The gradient flexible printed circuit has a narrow, minor end connected to the ITO circuit and a wider, major end connected to the printed circuit board assembly. Because the gradient flexible printed circuit has different end widths, the gradient flexible printed circuit permits reduced spacing of electronic components in proximity of the narrower minor end. Signaling between the electronic components is improved, and electromagnetic shielding is reduced. The gradient flexible printed circuit also has a smaller dimensional stack, thus allowing for a larger display viewing area and a thinner display.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 18, 2024
    Inventors: Wu Chin-Chung, Tsung-Chin Cheng, Hong-Ji Huang
  • Publication number: 20230409462
    Abstract: A method for system profiling and controlling and a computer system performing the same are provided. In the method, an operating system is operated after the computer system is booted, in which a profiling-controlling system is operated. When the operating system loads and executes a system profiling-controlling program, the profiling-controlling system that simultaneously operates a profiling routine and a controlling routine is initiated. The profiling routine is used to retrieve system kernel data that is generated during operation of the operating system and analyze the system kernel data through a kernel tracing tool. When it is determined that controlling is required, the profiling routine notifies the controlling routine. The controlling routine controls operating parameters of the operating system in real time according to an analysis result generated by the profiling routine.
    Type: Application
    Filed: May 25, 2023
    Publication date: December 21, 2023
    Inventors: YI-KUAN WU, SHENG-KAI HUNG, TSAI-WEI WU, TSAI-CHIN CHENG, YU-KUEN WU
  • Publication number: 20230362236
    Abstract: A distributed computing system has one or more clusters each including compute nodes connected by a cluster network and executing microservices in respective containers organized into pods. The system includes application slice components (routers, slice gateways) distributed among the clusters to define and operate application slices each providing application slice services for respective sets of pods distributed among the clusters. Each slice gateway provides an interface between local pods of the application slice and remote pods of the application slice on a respective different cluster. Each slice is associated with namespaces, network policies and resource quotas for the applications onboarded on the slice. The slice routers and slice gateways for a given application slice form a respective slice-specific overlay network providing cross-cluster network services including service discovery and traffic forwarding with isolation from other application slices that co-reside on the clusters.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Inventors: Raj Nair, Prabhudev Navali, Sudhir Halbhavi, Chin-Cheng Wu, Eric Peterson, Prasad Dorbala
  • Patent number: 11807787
    Abstract: A luminescence conversion material is provided. The luminescence conversion material includes: a hybrid luminescence conversion particle, a first cladding material covering the hybrid luminescence conversion particle, and a second cladding material formed on the first cladding material and covering the first cladding material. The hybrid luminescence conversion particle includes a matrix and a plurality of quantum dots uniformly dispersed in the matrix. The first cladding material includes silicon oxide. The ratio ? (absorbance ratio ?: A939/A1000-1150) of the absorbance at 939 cm?1 (A939) to the absorbance peak at 1000-1150 cm?1 (A1000-1150) in a FTIR spectrum of the first cladding material is less than or equal to 0.8.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: November 7, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chin-Cheng Weng, Ming-Chang Li, Po-Jung Hsu
  • Patent number: 11806710
    Abstract: A semiconductor package structure includes a substrate, a die and a conductive structure. The die is disposed on or within the substrate. The die has a first surface facing away from the substrate and includes a sensing region and a pad at the first surface of the die. The first surface of the die has a first edge and a second edge opposite to the first edge. The sensing region is disposed adjacent to the first edge. The pad is disposed away from the first edge. The conductive structure electrically connects the pad and the substrate. The sensing region has a first end distal to the first edge of the first surface of the die. A distance from the first end of the sensing region to a center of the pad is equal to or greater than a distance from the first end of the sensing region to the first edge of the first surface of the die.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: November 7, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsiao-Yen Lee, Ying-Te Ou, Chin-Cheng Kuo, Chung Hao Chen
  • Patent number: 11784111
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chin-Cheng Kuo, Wu Chou Hsu
  • Patent number: 11784110
    Abstract: A semiconductor package may include a substrate; a microelectromechanical device disposed on the substrate; an interconnection structure connecting the substrate to the microelectromechanical device; and a metallic sealing structure surrounding the interconnection structure.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung Hao Chen, Chin-Cheng Kuo
  • Publication number: 20230309299
    Abstract: A memory device includes a dielectric substrate, an interlayer structure, a plurality of channel pillars, a plurality of charge storage structures, a plurality of slit structures and an assistance structure. The dielectric substrate includes an array region and an iso region aside the array region. The interlayer structure is disposed in the array region and the iso region. The channel pillars penetrate through the interlayer structure in the array region. The charge storage structures are disposed between the interlayer structure and the plurality of channel pillars. The slit structures are disposed between the plurality of channel pillars, penetrate through the interlayer structure in the array region, and divide the interlayer structure into a plurality of blocks. The assistance structure is arranged in the iso region. The assistance structure includes at least one dummy slit structure having an extension direction different from an extension direction of the plurality of slit structures.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 28, 2023
    Applicant: MACRONIX International Co., Ltd.
    Inventor: Chin-Cheng Yang
  • Patent number: 11770426
    Abstract: A software-defined media platform having one or more media processing units that may be dynamically instantiated, interconnected and configured according to changes in demand, resource availability, and other parameters affecting system performance relative to demand. In one example media processing method, a source media stream may be received via multicast or unicast. The source media stream may be processed into one or more levels of work product segments having different media characteristics by a plurality of transcoding processing units, as needed. One or more levels of work product segments, or the source media stream, may be packaged (e.g., including resegmenting) into final work product segments having select media characteristics, which may be uploaded to a cloud storage unit for delivery to end users.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: September 26, 2023
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Paul Tweedale, Chin-Cheng Wu, Michael Shearer, Tung Ng
  • Publication number: 20230298997
    Abstract: A routing pattern is provided. The routing pattern includes a first routing region, a second routing region and an interconnection region. The first routing region includes a plurality of first conductive lines extending along a first direction. The plurality of first conductive lines has a first pitch along a second direction perpendicular to the first direction. The second routing region includes a plurality of second conductive lines extending along the first direction. The plurality of second conductive lines has a second pitch along the second direction, and the second pitch is approximately equal to the first pitch. The interconnection region includes two body parts and a connecting part connecting to the body parts. The body parts are disposed separately along the first direction. A width of the connecting part along the second direction is smaller than a width of the body parts along the second direction.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: Chin-Cheng YANG, Yun-Chu LIN
  • Patent number: 11757982
    Abstract: A technique performs load balancing self-adjustment within an application environment. The technique involves, while nodes of the application environment load balance traffic among clusters that provide services for an application in accordance with a first load balancing configuration, sensing application environment metrics. The technique further involves performing a self-adjustment operation that generates a second load balancing configuration based on the application environment metrics, the second load balancing configuration being different from the first load balancing configuration. The technique further involves deploying the second load balancing configuration among the nodes to enable the nodes to load balance the traffic among the clusters that provide the services for the application in accordance with second load balancing configuration in place of the first load balancing configuration.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: September 12, 2023
    Assignee: Avesha, Inc.
    Inventors: Raj Nair, Prabhudev Navali, Sudhir Halbhavi, Chin-Cheng Wu
  • Patent number: 11739642
    Abstract: The disclosed embodiment is related to a manufacturing method of a die-formed 3-dimensional plastic impeller of a centrifugal pump and the impeller manufactured thereby, including a mold for twisted blade and a mold for impeller outlet, the mold for twisted blade is configured to form a twisted blade portion of each blade of the impeller, the mold for impeller outlet is configured to form a rear portion of each blade, a hub rim part of the impeller, and a shroud rim part of the impeller so that the hub rim part, the shroud rim part, and the blades are formed in a single piece at the same molding process.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: August 29, 2023
    Assignee: ASSOMA INC.
    Inventors: Chih-Hsien Shih, Chih-Kuan Shih, Huan-Jan Chien, Shu-Yen Chien, Chin-Cheng Wang, Yuan Hung Lin, Peng-Hsiang Chen
  • Patent number: 11736559
    Abstract: Techniques manage cluster resources within an application environment. The techniques involve identifying a group of cluster resources from a plurality of cluster resources of the application environment, the plurality of cluster resources being constructed and arranged to provide a plurality of services. The techniques further involve forming an application slice having the group of cluster resources. The techniques further involve deploying the application slice to provide services. Certain techniques provide a platform that allows operators to build application slices (or application overlays) that are a way of grouping application pods (or containers) based on one or more organizing principles such as velocity of deployment, security, governance, etc.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: August 22, 2023
    Assignee: Avesha, Inc.
    Inventors: Raj Nair, Prabhudev Navali, Sudhir Halbhavi, Chin-Cheng Wu
  • Patent number: 11720275
    Abstract: A file reading method includes following operations: determining, by a processor, whether a file in a SIM card is stored in a non-volatile memory; performing, by the processor, a reading process to read the file from the SIM card if the file is not stored in the non-volatile memory; and storing, by the processor, the file into the non-volatile memory.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: August 8, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chin Cheng, Yi-Xin Huang, Xiao-Lu Ma
  • Publication number: 20230207746
    Abstract: A light color conversion layer structure includes a pixel separation layer over a substrate. The pixel separation layer includes several separating components. The receiving region over the substrate is defined by adjacent separating components. The light color conversion layer structure also includes a first isolation layer continuously formed over the substrate and on the sidewalls of the separating components surrounding the receiving region. The first isolation layer continuously covers the top surface of the substrate and the sidewalls of the separating components adjacent to the receiving region. The light color conversion layer structure also includes a light color conversion unit within the receiving region and on the first isolation layer. The light color conversion layer structure further includes a second isolation layer on the first isolation layer and the light color conversion unit. The second isolation layer covers the first isolation layer and the light color conversion unit.
    Type: Application
    Filed: October 28, 2022
    Publication date: June 29, 2023
    Inventors: Han-Cheng YEH, Ming-Chang LI, Ming-Tzung WU, Chin-Cheng WENG
  • Publication number: 20230203367
    Abstract: A luminescence conversion material is provided. The luminescence conversion material includes: a hybrid luminescence conversion particle, a first cladding material covering the hybrid luminescence conversion particle, and a second cladding material formed on the first cladding material and covering the first cladding material. The hybrid luminescence conversion particle includes a matrix and a plurality of quantum dots uniformly dispersed in the matrix. The first cladding material includes silicon oxide. The ratio ? (absorbance ratio ?: A939/A1000-1150) of the absorbance at 939 cm?1 (A939) to the absorbance peak at 1000-1150 cm?1 (A1000-1150) in a FTIR spectrum of the first cladding material is less than or equal to 0.8.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chin-Cheng WENG, Ming-Chang LI, Po-Jung HSU