Abstract: A storage device includes a controller and a memory. A method of storage space management for the storage device is executed to perform steps as below. The controller calculates an expectedly used capacity and an effective capacity of the memory. The controller determines whether blocks of the memory include one or more blocks that are non-bad blocks and are prohibited from reading/writing. When the one or more blocks are determined to be non-bad blocks and to be prohibited from reading/writing, the controller marks each of the one or more blocks as a restricted block other than a bad block, thereby maintaining the effective capacity to be unchanged. The controller compares difference of the effective capacity and a total capacity of the one or more blocks that are marked as the restricted block to the expectedly used capacity to determine whether to prohibit programming to the memory.

Abstract: Substituted furanopyrimidine chemical entities of Formula (I): wherein Ra has any of the values described herein, and compositions comprising such chemical entities; methods of making them; and their use in a wide range of methods, including metabolic and reaction kinetic studies; detection and imaging techniques; radioactive therapies; modulating and treating disorders mediated by PDE1 activity or dopaminergic signaling; treating neurological disorders, CNS disorders, dementia, neurodegenerative diseases, and trauma-dependent losses of function; treating stroke, including cognitive and motor deficits during stroke rehabilitation; facilitating neuroprotection and neurorecovery; enhancing the efficiency of cognitive and motor training, including animal skill training protocols; and treating peripheral disorders, including cardiovascular, renal, hematological, gastroenterological, liver, cancer, fertility, and metabolic disorders.

Abstract: An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.

Abstract: A silicon photonics optical transceiver device includes a silicon photonics optical module and a heat conducting housing that accommodates the silicon photonic optical module therein. The heat conducting housing has an inner surface formed with a first heat dissipation portion that wraps around and is in contact with transmitter optical sub-assemblies of the silicon photonics optical module to realize thermal conduction, and a second heat dissipation portion that is in contact with a digital signal processor of the silicon photonics optical module to realize thermal conduction.

Abstract: A method for enabling a user to paint an image uploaded to a device is provided. The method includes uploading an image to the device, performing a depth estimation on the image to generate a depth map, and performing an edge detection on the image to generate a first edge map. The method also includes performing the edge detection on the depth map to generate a second edge map, performing a skeletonization function on the first edge map to generate a third edge map, and performing the skeletonization function on the depth map to generate a fourth edge map. The method also includes generating a final edge map using the third edge map and the fourth edge map, generating a colorized image by applying color to the final edge map to paint at least one wall of a scene, and displaying the colorized image on a display of the device.

Abstract: An exemplary embodiment of the present inventive concept provides a display device including: a substrate; a plurality of first wires extending along a first direction on the substrate; a first insulating layer disposed on the plurality of first wires; a plurality of second wires disposed on the first insulating layer and extending along a second direction crossing the first direction; a second insulating layer disposed on the plurality of second wires; and a plurality of pixel electrodes disposed on the second insulating layer, wherein the second insulating layer includes a first opening which is disposed between the plurality of pixel electrodes.

Abstract: To provide more test data during the manufacture of non-volatile memories and other integrated circuits, machine learning is used to generate virtual test values. Virtual test results are interpolated for one set of tests for devices on which the test is not performed based on correlations with other sets of tests. In one example, machine learning determines a correlation study between bad block values determined at die sort and photo-limited yield (PLY) values determined inline during processing. The correlation can be applied to interpolate virtual inline PLY data for all of the memory dies, allowing for more rapid feedback on the processing parameters for manufacturing the memory dies and making the manufacturing process more efficient and accurate. In another set of embodiments, the machine learning is used to extrapolate limited metrology (e.g., critical dimension) test data to all of the memory die through interpolated virtual metrology data values.

Abstract: The present disclosure relates to a method of forming a device. The method includes depositing a first layer of getter material on a substrate. A first electrode is formed in a first conductive layer deposited on the first layer of getter material. An insulator element is formed in a piezoelectric layer deposited on the first electrode. A second electrode is formed in a second conductive layer deposited on the insulator element. A first input-output electrode is formed to be conductively connected to the first layer of getter material and a second input-output electrode is formed to be conductively connected to the second electrode.

Abstract: A heterogeneous integration chip of a micro fluid actuator is disclosed and includes a first substrate, a first insulation layer, a first conductive layer, a piezoelectric layer, a second conductive layer, a second substrate, a control element, a perforated trench and a conductor. The first substrate includes a first chamber. The first insulation layer is disposed on the first substrate. The first conductive layer is disposed on the first insulation layer and includes an electrode pad. The piezoelectric layer and the second conductive layer are stacked on the first conductive layer sequentially. The second substrate is assembled to the first substrate through a bonding layer to define a second chamber and includes an orifice, a fluid flowing channel and a third chamber. The control element is disposed in the second substrate. The perforated trench filled with the conductor is penetrated from the electrode pad to the second substrate.

Abstract: Multiple systems may determine neural-network output data and neural-network parameter data and may transmit the data therebetween to train and run the neural-network model to predict an event given input data. A data-provider system may perform a dot-product operation using encrypted data, and a secure-processing component may decrypt and process that data using an activation function to predict an event. Multiple secure-processing components may be used to perform a multiplication operation using homomorphic encrypted data.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a gate dielectric layer on the fin-shaped structure; forming a gate electrode on the fin-shaped structure; performing a nitridation process to implant ions into the gate dielectric layer adjacent to two sides of the gate electrode; and forming an epitaxial layer adjacent to two sides of the gate electrode.

Abstract: A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.

Abstract: A magnetic resonance imaging apparatus according to an embodiment includes sequence controlling circuitry and processing circuitry. The sequence controlling circuitry acquires a first piece of data by executing a first pulse sequence having a first Echo Time (TE) value, to acquire a second piece of data by executing a second pulse sequence having a second TE value different from the first TE value, and to acquire a third piece of data by executing a third pulse sequence having a third TE value different from the first and the second TE values. The processing circuitry extracts a signal related to water, a signal related to a first fat, and a signal related to a second fat, on the basis of the first piece of data, the second piece of data, and the third piece of data.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes channel members vertically stacked over a substrate, a gate structure engaging the channel members, a gate spacer layer disposed on sidewalls of the gate structure, an epitaxial feature abutting the channel members, an inner spacer layer interposing the gate structure and the epitaxial feature, and a semiconductor layer interposing the inner spacer layer and the epitaxial feature.

Abstract: A light emitting device including a first light emitting portion that emits white light at a color temperature of 6000K or more and a second light emitting portion that emits white light at a color temperature of 3000K or less, which include light emitting diode chips and phosphors and are independently driven.

Abstract: A compound comprising a structure in which isotretinoin is linked to a peptide via a covalent bond and an antibiotic, anti-inflammatory, or anti-oxidative pharmaceutical or cosmetic composition comprising the same. A compound having a structure in which isotretinoin is linked to a peptide via a covalent bond according to the present invention exhibits excellent physiological activity such as antibiotic, anti-inflammatory, or anti-oxidative actions, as well as having outstanding properties, such as solubility in water, etc., and thus can find useful applications in various fields including medicines, cosmetics, etc.

Abstract: A heterogeneous integration detecting method and a heterogeneous integration detecting apparatus are provided. The heterogeneous integration detecting method includes the following. Under the condition of maintaining the same relative distance between an interference objective lens and a sample, the relative posture of the interference objective lens and the sample is continuously adjusted according to the change of an image of the sample in the field of view of the interference objective lens until a first optical axis of the interference objective lens is determined to be substantially perpendicular to the surface of the sample according to the image. The interference objective lens is replaced with an imaging objective lens and the geometric profile of at least one via of the sample is detected. A second optical axis of the imaging objective lens after replacement overlaps with the first optical axis of the interference objective lens before replacement.