Patents by Inventor AN HUANG

AN HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367489
    Abstract: A memory device is disclosed. The memory device includes a substrate having a first side and a second side that is opposite to the first side, and a transistor disposed on the first side of the substrate. The memory device includes a capacitor electrically connected to the transistor and including a first terminal, a second terminal, and an insulation layer interposed between the first and second terminals, at least the insulation layer disposed on the second side of the substrate. The transistor and the capacitor form a one-time programmable (OTP) memory cell.
    Type: Application
    Filed: September 13, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Meng-Sheng Chang, Chia-En Huang, Yih Wang
  • Publication number: 20220362907
    Abstract: Provided herein are chemical-mechanical planarization (CMP) systems and methods to reduce metal particle pollution on dressing disks and polishing pads. Such methods may include contacting a dressing disk and at least one conductive element with an electrolyte solution and applying direct current (DC) power to the dressing disk and the at least one conductive element.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Chih-Chieh CHANG, Yen-Ting CHEN, Hui-Chi HUANG, Kei-Wei CHEN
  • Publication number: 20220367662
    Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes forming a liner-free conductive structure on a cobalt conductive structure disposed on a substrate, depositing a cobalt layer on the liner-free conductive structure and exposing the liner-free conductive structure to a heat treatment. The method further includes removing the cobalt layer from the liner-free conductive structure.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing, Co., Ltd.
    Inventors: Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Chun-Hsien Huang, Hung-Yi Huang, Keng-Chu Lin, Ken-Yu Chang, Sung-Li Wang, Chia-Hung Chu, Hsu-Kai Chang
  • Publication number: 20220369192
    Abstract: A method for S-NSSAI handling of a 5GS capable UE supporting session continuity between 3GPP and non-3GPP interworking is proposed. The UE maintains a PDN connection/PDU session. The UE performs interworking among S1 mode, N1 mode (including 3GPP and non-3GPP access), and ePDG. The UE associates the existing S-NSSAI with the new PDN connection/PDU session after interworking, no matter whether the S-NSSAI is provided by the network or not. The UE can update the S-NSSAI upon receipt of new value from the network. When interwork to N1 mode, the UE applies the S-NSSAI.
    Type: Application
    Filed: April 12, 2022
    Publication date: November 17, 2022
    Inventor: Chien-Chun Huang-Fu
  • Publication number: 20220361841
    Abstract: Systems, methods, and devices that perform flow scan sequences are provided. In one embodiment, an ultrasound imaging system includes an intraluminal catheter or guidewire, an annular array of acoustic elements positioned around a circumference of the catheter or guidewire, and a processor in communication with the annular array. The processor is configured to activate a first subaperture of the annular array at a first time, thereafter, activate a second interleaving subaperture, and activate the first subaperture again at a different, second time such that the scan sequence moves around the circumference of the catheter or guidewire. Temporal differences between the received ultrasound signals obtained by the first subaperture at the first and second times are determined to detect motion around the annular array. By interleaving subaperture firings, the total number of firings to form an image frame can be reduced.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 17, 2022
    Inventors: Jun Seob SHIN, Francois Guy Gerard Marie VIGNON, David HOPE SIMPSON, Andrew HANCOCK, Sheng-Wen HUANG
  • Publication number: 20220367194
    Abstract: In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.
    Type: Application
    Filed: September 30, 2021
    Publication date: November 17, 2022
    Inventors: Min-Hsuan LU, Kan-Ju LIN, Lin-Yu HUANG, Sheng-Tsung WANG, Hung-Yi HUANG, Chih-Wei CHANG, Ming-Hsing TSAI, Chih-Hao WANG
  • Publication number: 20220365608
    Abstract: A calibration method and a calibration apparatus for a knob applicable to a touch panel are provided. The knob includes at least one sensing pad. The calibration method includes: obtaining sensed position(s) of each sensing pad by sensing a position of the sensing pad through the touch panel; and calculating a position of a center of the knob by using a formula of a radius of a circumscribed circle according the sensed position(s) of each sensing pad.
    Type: Application
    Filed: November 21, 2021
    Publication date: November 17, 2022
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chun-Jen Su, Cheng-Hung Tsai, Po-Hsuan Huang, Chun-Kai Chuang
  • Publication number: 20220361777
    Abstract: Provided is a transdermal microneedle array patch, including: a bottom cover; a top cover; a substrate disposed within the top cover; and a first probe and a second probe disposed between the bottom cover and the top cover and electrically connected the substrate. The first and second probes form an open circuit. While the bottom cover is combined with the top cover to form the transdermal microneedle array patch, the first and second probes form a closed circuit.
    Type: Application
    Filed: February 4, 2022
    Publication date: November 17, 2022
    Inventors: Jung-Tang Huang, Kuan-Ting Lee, Dahong Qian
  • Publication number: 20220363932
    Abstract: The present disclosure provides a method of manufacturing a conductive coating which includes preparing a conductive powder, preparing a wet conductive powder, preparing a base slurry, and performing a centrifugal mixing process. A graphite and a carbon black are uniformly mixed and performed on a powder refining process to obtain the conductive powder. The conductive powder and an additive are uniformly mixed to obtain the wet conductive powder. A neoprene and a solvent are uniformly mixed and performed on a ball milling process to obtain the base slurry. 45 parts by weight to 55 parts by weight of the wet conductive powder and 45 parts by weight to 55 parts by weight of the base slurry are centrifugal mixed in a centrifugal mixing process at 900 rpm to 1000 rpm to obtain the conductive coating having a viscosity between 55000 cP and 60000 cP.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 17, 2022
    Inventors: Hou-Sheng HUANG, Chien-Lung SHEN
  • Publication number: 20220367180
    Abstract: The present disclosure is generally related to semiconductor devices, and more particularly to a dielectric material formed in semiconductor devices. The present disclosure provides methods for forming a dielectric material layer by a cyclic spin-on coating process. In an embodiment, a method of forming a dielectric material on a substrate includes spin-coating a first portion of a dielectric material on a substrate, curing the first portion of the dielectric material on the substrate, spin-coating a second portion of the dielectric material on the substrate, and thermal annealing the dielectric material to form an annealed dielectric material on the substrate.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Inventors: Je-Ming Kuo, Yen-Chun Huang, Chih-Tang Peng, Tien-I Bao
  • Publication number: 20220362348
    Abstract: The present invention provides a lactoferrin, a derived peptide thereof, a composition comprising the same and a use thereof for inhibiting and/or alleviating lipid synthesis. The lactoferrin comprises the amino acid sequence of SEQ ID NO: 01, and the derived peptide of the lactoferrin comprises at least one selected from the amino acid sequences of SEQ ID NO: 02, SEQ ID NO: 03, and SEQ ID NO: 04.
    Type: Application
    Filed: August 19, 2021
    Publication date: November 17, 2022
    Applicant: RENORIGIN INNOVATION INSTITUTE CO., LTD.
    Inventors: Hsiu-Chin HUANG, Hsuan LIN
  • Publication number: 20220367340
    Abstract: Devices and methods of manufacture for a graduated, “step-like,” capacitance structure having two or more capacitors. A semiconductor structure comprising a capacitor structure, the capacitor structure comprising a first capacitor and a second capacitor. The first capacitor comprising a first bottom electrode and a top electrode having a bottom surface that is a first distance from a top surface of the first bottom electrode. The second capacitor comprising a second bottom electrode and the top electrode, in which the bottom surface is a second distance from a top surface of the second bottom electrode, and in which the first distance is different from the second distance.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 17, 2022
    Inventors: Jheng-Hong JIANG, Shing-Huang WU, Chia-Wei LIU
  • Publication number: 20220367193
    Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Ya-Lan Chang, Ting-Gang Chen, Tai-Chun Huang, Chi On Chui, Yung-Cheng Lu
  • Publication number: 20220364146
    Abstract: Provided is multiplex and asymmetric amplification of nucleic acid molecules. In particular, provided is a method for simultaneous and asymmetric amplification of one or more target nucleic acids in a sample. The method can simultaneously and asymmetrically amplify multiple target nucleic acids existing in a sample, and can simultaneously produce large number of single stranded products.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 17, 2022
    Inventors: Qiuying HUANG, Qingge LI
  • Publication number: 20220367619
    Abstract: A semiconductor structure includes one or more channel layers; a gate structure engaging the one or more channel layers; a first source/drain feature connected to a first side of the one or more channel layers and adjacent to the gate structure; a first dielectric cap disposed over the first source/drain feature, wherein a bottom surface of the first dielectric cap is below a top surface of the gate structure; a first via disposed under and electrically connected to the first source/drain feature; and a power rail disposed under and electrically connected to the first via.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Li-Zhen Yu, Huan-Chieh Su, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20220361783
    Abstract: The present invention provides a sensing structure of a micro biosensor for performing a measurement of a physiological parameter of a target analyte of a biofluid and reducing an interference of an interferant of the biofluid on the measurement by an electrochemical reaction. The sensing structure includes: a substrate having a surface; a first working electrode configured on the surface, and including an active surface; at least one second working electrode configured on the surface and adjacent to the first working electrode, for consuming the interferant by the electrochemical reaction; and an isolated layer configured with respect to the active surface to program a diffusive distribution of the interferant when the biofluid flows through the second working electrode, wherein at least the interferant of the biofluid passes through the second working electrode over a time period and is consumed by the second working electrode by the electrochemical reaction.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 17, 2022
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Pi-Hsuan Chen, Chi-Hao Chen, Heng-Chia Chang
  • Publication number: 20220364303
    Abstract: A thermoplastic artificial leather is provided, which includes a first structure layer, a second structure layer, a plurality of recycled particles, and a third structure layer, in which the second structure layer is disposed on the first structure layer, the plurality of recycled particles disposed on the second structure layer, and the third structure layer is disposed to cover the plurality of recycled particles. According to above stacked structure, the thermoplastic artificial leather with environment friendly is formed, and the plurality of recycled particles is processed in a physical manner, which can solve the problem, the environmental protection issue, caused by the use of solvent to process the recycled particle in the prior art. Use of the material characteristics of each structure layer to reprocess the recycled particles, so the reprocess procedure without using any solvent, so the environmental pollution and the production cost are greatly reduced.
    Type: Application
    Filed: March 8, 2022
    Publication date: November 17, 2022
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chien-Chia Huang, Tsung-Yu Tsai, Chieh Lee, Wei-Ling Chen
  • Publication number: 20220367387
    Abstract: A semiconductor device includes a first circuit element over a substrate; a fill material over the substrate and in contact with sides of the first circuit element; and a dishing resistant (DR) structure in the fill material and outside a perimeter of the first circuit element. Some DR structures are dummy structures manufactured in the fill material over the substrate.
    Type: Application
    Filed: July 30, 2021
    Publication date: November 17, 2022
    Inventors: Meng-Han LIN, Chia-En HUANG
  • Publication number: 20220365634
    Abstract: A control display method is performed by an electronic device, the method including: displaying a graphical user interface (GUI), the GUI including a virtual character located in a virtual environment and a control; updating a display position of the virtual character on the GUI as the virtual character moves in the virtual environment; and in accordance with a determination that the control blocks the virtual character at the display position: increasing a transparency of the control. The control display method enables a user to better observe the virtual character that would have been blocked by the control, and dynamic changes of the transparency of the control is more likely to attract the user's attention, so that the user does not miss important information.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 17, 2022
    Inventors: Qingchun LU, Hongchang Huang, Bin Huang
  • Publication number: 20220365890
    Abstract: A bus system is provided. A memory device is electrically connected to a master device via a serial peripheral interface (SPI) bus. A plurality of slave devices are electrically connected to the master device via an enhanced SPI (eSPI) bus. Each of the slave devices has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert-handshake control line. The first slave device is electrically connected to the memory device via the SPI bus. After obtaining a program code from the memory device, the first slave device verifies the program code using a security code and controls the alert-handshake control line to unlock all the slave devices except for the first slave device via the alert handshake pin in response to the program code being verified. The unlocked slave devices communicate with the master device via the eSPI bus.
    Type: Application
    Filed: December 15, 2021
    Publication date: November 17, 2022
    Inventors: Chih-Hung HUANG, Kang-Fu CHIU, Hao-Yang CHANG