Patents by Inventor AN HUANG

AN HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220362935
    Abstract: A dual-arm robot assembling system including a controlling unit, a GUI, a first robotic-arm, and a second robotic-arm is disclosed. The GUI provides a graphic program editing page, which provides multiple instruction blocks used for editing a graphical program executed by the assembling system. At least one of the first robotic arm and the second robotic arm is disposed with a point-teaching tool thereon. Before the controlling unit controls the two robotic arms to perform an assembling operation based on the graphical program, a manager may directly drag the two robotic arms through the point-teaching tool, so as to implement a point-teaching procedure for the two robotic arms. Therefore, the assembling system may accomplish the assembling operation through the two robotic arms with cooperative movement.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 17, 2022
    Inventors: Meng-Zong LI, Han-Ching LIN, Shi-Yu WANG, Po-Chiao HUANG, Cheng-Hao HUANG
  • Publication number: 20220366430
    Abstract: Data stream based event sequence anomaly detection for mobility customer fraud analysis is presented herein. A system obtains a sequence of events comprising respective modalities of communication that correspond to a subscriber identity associated with a communication service—the sequence of events having occurred within a defined period. Based on defined classifiers representing respective fraudulent sequences of events, the system determines, via a group of machine learning models corresponding to respective machine learning processes, whether the sequence of events satisfies a defined condition with respect to likelihood of representing a fraudulent sequence of events of the respective fraudulent sequences of events. In response to the sequence of events being determined to satisfy the defined condition, the system sends, via a user interface of the system, a notification indicating that the sequence of events has been determined to represent the fraudulent sequence of events.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Inventors: Ryan Steckel, Ana Armenta, Prince Paulraj, Chih Chien Huang
  • Publication number: 20220366119
    Abstract: Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment are discussed. More particularly, a virtual fabrication environment models, as part of a process sequence, oxidant dispersion in a depth-dependent manner and simulates the subsequent oxidation reaction based on the determined oxidant thickness along an air/silicon interface. Further the virtual fabrication environment performs depth-dependent etch modeling as part of a process sequence to determine etchant concentration and simulate the etching of material along an air/material interface.
    Type: Application
    Filed: February 28, 2022
    Publication date: November 17, 2022
    Inventors: Qing Peng Wang, Shi-hao Huang, Yu De Chen, Joseph Ervin
  • Publication number: 20220369393
    Abstract: A method for handling a collision of a UE-requested PDU session establishment procedure and a network-requested PDU session release procedure is proposed. When a PDU SESSION ESTABLISHMENT REQUEST message indicates that the UE-requested PDU session establishment request procedure is to handover an existing PDU session between 5G 3GPP access and 5G non-3GPP access, the UE proceeds with the network-requested PDU session release procedure and aborts the UE-requested PDU session establishment procedure. Otherwise, the UE ignores a received PDU SESSION RELEASE COMMAND message and proceeds with the UE-requested PDU session establishment procedure.
    Type: Application
    Filed: April 12, 2022
    Publication date: November 17, 2022
    Inventors: Chien-Chun Huang-Fu, Chi-Hsien Chen
  • Publication number: 20220368991
    Abstract: The present disclosure provides a media resource playing and text rendering method, apparatus and device and a storage medium. The method comprises: determining, on the basis of a first data box type or a first group type, a region of interest of an omnidirectional video and at least one media resource associated with the region of interest; and playing at least one media resource associated with the region of interest.
    Type: Application
    Filed: November 12, 2020
    Publication date: November 17, 2022
    Applicant: ZTE Corporation
    Inventors: Yaxian Bai, Cheng Huang
  • Publication number: 20220367379
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a fin disposed over a substrate, a gate structure disposed over a channel region of the fin, such that the gate structure traverses source/drain regions of the fin, a device-level interlayer dielectric (ILD) layer of a multi-layer interconnect structure disposed over the substrate, wherein the device-level ILD layer includes a first dielectric layer, a second dielectric layer disposed over the first dielectric layer, and a third dielectric layer disposed over the second dielectric layer, wherein a material of the third dielectric layer is different than a material of the second dielectric layer and a material of the first dielectric layer. The semiconductor device further comprises a gate contact to the gate structure disposed in the device-level ILD layer and a source/drain contact to the source/drain regions disposed in the device-level ILD layer.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 17, 2022
    Inventors: Lin-Yu Huang, Sheng-Tsung Wang, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20220365211
    Abstract: A centroid detection method based on a single-pixel detector, including: S1: establishing a photoelectric detection and acquisition system, and generating three two-dimensional (2D) array matrices A, B and C; S2: generating, by letting element value of each column in the matrix A be the corresponding serial number of the column, element value of each row in the matrix B be the corresponding serial number of the row, and element value of the matrix C be 1, 2D modulation information having distribution of the matrices A, B and C; S3: modulating illumination light according to the mode of the 2D modulation information and projecting the illumination light to a target object or modulating, according to the mode of the 2D modulation information, an image formed by the target object; and S4: acquiring intensity value of target reflected light to obtain position parameter of the target centroid.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Applicant: HEFEI INSTITUTES OF PHYSICAL SCIENCE, CHINESE ACADEMY OF SCIENCES
    Inventors: Yingjian WANG, Dongfeng SHI, Jian HUANG, Ke'e YUAN, Linbin ZHA
  • Publication number: 20220362203
    Abstract: Provided are an inhibitor of PI4KIII?/FAM126/TTC7 complex and a method that uses the inhibitor to prevent or treat mood disorders.
    Type: Application
    Filed: September 27, 2020
    Publication date: November 17, 2022
    Inventors: Fude HUANG, Wen'an WANG, Changping JIAO, Changde HUANG, Tide HUANG
  • Publication number: 20220367206
    Abstract: An etchant for etching a cobalt-containing member in a semiconductor structure includes a fluorine-free acid and an alkaline solution, a rate of etching a cobalt-containing member by the etchant is greater than a rate of etching a nitride-containing member by the etchant, and a level of dissolved oxygen of the etchant is less than or equal to 100 ppb. A semiconductor structure, includes a plurality of epitaxial structures over a substrate, a gate structure over the substrate and between two of the plurality of epitaxial structures; a cobalt-containing member over one of the epitaxial structures and adjacent to the gate structure; and a dielectric member over the cobalt-containing member, wherein a top surface of the cobalt-containing member is formed by etching a portion of the cobalt-containing member using an etchant including a fluorine-free acid and an alkaline solution.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: REN-KAI CHEN, LI-CHEN LEE, SHUN WU LIN, MING-HSI YEH, KUO-BIN HUANG
  • Publication number: 20220367291
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu
  • Publication number: 20220364236
    Abstract: In an embodiment, an apparatus includes: a susceptor including substrate pockets; a gas injector disposed over the susceptor, the gas injector having first process regions, the gas injector including a first gas mixing hub and first distribution valves connecting the first gas mixing hub to the first process regions; and a controller connected to the gas injector and the susceptor, the controller being configured to: connect a first precursor material and a carrier gas to the first gas mixing hub; mix the first precursor material and the carrier gas in the first gas mixing hub to produce a first precursor gas; rotate the susceptor to rotate a first substrate disposed in one of the substrate pockets; and while rotating the susceptor, control the first distribution valves to sequentially introduce the first precursor gas at each of the first process regions as the first substrate enters each first process region.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 17, 2022
    Inventors: Yung-Chang Chang, Meng-Yin Tsai, Tung-Hsiung Liu, Liang-Yu Yeh, Chun-Yi Lee, Kuo-Hsi Huang
  • Publication number: 20220367726
    Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Inventors: Shih-Hao LIN, Chih-Chuan YANG, Chih-Hsuan CHEN, Bwo-Ning CHEN, Cha-Hon CHOU, Hsin-Wen SU, Chih-Hsiang HUANG
  • Publication number: 20220367353
    Abstract: In forming a semiconductor structure, a two-step breakthrough etching method is employed in which a glue layer and dielectric liner are broken-through sequentially in order to successfully gain device performance and avoid drain or gate metal damage.
    Type: Application
    Filed: September 30, 2021
    Publication date: November 17, 2022
    Inventors: Jia-Chuan YOU, Chia-Hao CHANG, Li-Zhen YU, Lin-Yu HUANG
  • Publication number: 20220366898
    Abstract: Systems and methods are provided for training a machine learning model to learn speech representations. Labeled speech data or both labeled and unlabeled data sets is applied to a feature extractor of a machine learning model to generate latent speech representations. The latent speech representations are applied to a quantizer to generate quantized latent speech representations and to a transformer context network to generate contextual representations. Each contextual representation included in the contextual representations is aligned with a phoneme label to generate phonetically-aware contextual representations. Quantized latent representations are aligned with phoneme labels to generate phonetically aware latent speech representations.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Inventors: Yao QIAN, Yu WU, Kenichi KUMATANI, Shujie LIU, Furu WEI, Nanshan ZENG, Xuedong David HUANG, Chengyi WANG
  • Publication number: 20220368318
    Abstract: A circuit includes first and second power nodes having differing first and second voltage levels, and a reference node having a reference voltage level. A master latch outputs a first data bit based on a received data bit; a slave latch includes a first inverter that outputs a second data bit based on the first data bit and a second inverter that outputs an output data bit based on a selected one of the first data bit or a third data bit; a level shifter outputs the third data bit based on a fourth data bit; and a retention latch outputs the fourth data bit based on the second data bit. The first and second inverters and the level shifter are coupled between the first power node and the reference node, and the retention latch includes a plurality of transistors coupled between the second power node and the reference node.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Inventors: Kai-Chi HUANG, Yung-Chen CHIEN, Chi-Lin LIU, Wei-Hsiang MA, Jerry Chang Jui KAO, Shang-Chih HSIEH, Lee-Chung LU
  • Publication number: 20220367373
    Abstract: A multi-device graded embedding package substrate includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer includes a first conductive copper pillar layer and a first device cavity. The second dielectric layer includes a first wiring layer located in a lower surface of the second dielectric layer, a second conductive copper pillar layer and a heat dissipation copper block layer provided on the first wiring layer. The third dielectric layer includes a second wiring layer, a third conductive copper pillar layer provided on the second wiring layer. A first device is attached to the bottom of the first device cavity, and a terminal of the first device is in conductive connection with the second wiring layer. A second device is attached to the bottom of a second device cavity penetrating through the first, second and third dielectric layers.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 17, 2022
    Inventors: Xianming CHEN, Lei FENG, Benxia HUANG, Yejie HONG
  • Publication number: 20220367308
    Abstract: A semiconductor device package includes a carrier and an encapsulant disposed on the carrier. At least one portion of the encapsulant is spaced from the carrier by a space.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tun-Ching PI, Yen-Chi HUANG, Hao-Chih HSIEH, Jin Han SHIH
  • Publication number: 20220368296
    Abstract: The present disclosure provides a reconfigurable power amplifier (PA) based on a PIN switch and a design method thereof. The reconfigurable PA based on a PIN switch includes an input port, an input matching circuit, the PIN switch, a gate bias circuit, a transistor, a drain bias circuit, an output matching circuit and an output port, where the input matching network includes an input end connected to a power input end, and an output end connected to a gate of the transistor, the gate bias circuit is connected in parallel with the gate, the drain bias circuit is connected in parallel with a drain, the drain of the transistor is connected to an input end of the output matching circuit, and an output end of the output matching circuit serves as a power output.
    Type: Application
    Filed: January 12, 2022
    Publication date: November 17, 2022
    Inventors: Zhiqun CHENG, Songye WANG, Chao LE, Ze QIN, Xiebin HUANG, Yelong JIAN, Guohua LIU
  • Publication number: 20220366697
    Abstract: An image processing method and apparatus, an electronic device and a storage medium are provided. The method includes: at least one image to be processed and at least one attribute filtering condition of an event to be monitored are obtained; event detection is performed on the at least one image to be processed to obtain an intermediate detection result of the event to be monitored; event attribute extraction is performed on the at least one image to be processed to obtain at least one attribute of the event to be monitored; and a target monitoring result of the event to be monitored is obtained according to the intermediate detection result, the at least one attribute and the at least one attribute filtering condition of the event to be monitored.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Xiaoying HUANG, Weilin LI, An CAO
  • Publication number: 20220364055
    Abstract: The invention provides methods of making immune effector cells (for example, T cells, NK cells) that express a chimeric antigen receptor (CAR), and compositions generated by such methods.
    Type: Application
    Filed: August 30, 2019
    Publication date: November 17, 2022
    Inventors: Louise Treanor, Michael R. Greene, Jennifer Brogdon, Boris Engels, Glenn Dranoff, Olja Kodrasi, Hyungwook Lim, Akash Sohoni, Elizabeth Dorothy Pratico, Anniesha Hack, Aida Abujoub, Tony Fleming, Lu Huang, Connie Hong, John Blankenship, Brian Holmberg, Chonghui Zhang, Dexiu Bu, Andrew Price, Xu Zhu, Andrew Stein, Attilio Bondanza