Abstract: A structure for an integrated circuit is disclosed. The structure includes a crystalline substrate and four crystalline layers. The first crystalline layer of first lattice constant is positioned on the crystalline substrate. The second crystalline layer has a second lattice constant different from the first lattice constant, and is positioned on said first crystalline layer. The third crystalline layer has a third lattice constant different than said second lattice constant, and is positioned on said second crystalline layer. The strained fourth crystalline layer includes, at least partially, a MOSFET device.

Abstract: A method for filling a bone defect in a subject in need thereof is disclosed. The method includes heating a bone cement composition at a first temperature where the bone cement composition is fluidic, and delivering an effective amount of the fluidic bone cement composition at a second temperature to the bone defect thereby filling the bone defect and allowing the fluidic bone cement composition to solidify, the second temperature being sufficiently high for maintaining the bone cement composition fluidic without causing thermal necrosis. Also disclosed are systems for carrying out the method.

Abstract: An electrically erasable programmable read only memory (EEPROM) cell structure and a method of fabricating the same. The EEPROM cell comprising a substrate comprising two shallow trench isolation (STI) structures separated by a substrate portion; an intermediate patterned layer formed on the substrate such that the patterned layer covers respective portions of each STI structure; a floating gate bridging between the STI structures such that the floating gate extends over the intermediate patterned layer; a dielectric layer formed over the floating gate; and a control gate formed over the dielectric layer.

Abstract: Proposed is a package structure having a micro-electromechanical (MEMS) element, including a chip having a plurality of electrical connecting pads and a MEMS element formed thereon; a lid disposed on the chip for covering the MEMS element; a stud bump disposed on each of the electrical connecting pads; an encapsulant formed on the chip with part of the stud bumps being exposed from the encapsulant; and a metal conductive layer formed on the encapsulant and connected to the stud bumps. The invention is characterized by completing the packaging process on the wafer directly to enable thinner and cheaper package structures to be fabricated within less time. This invention further provides a method for fabricating the package structure as described above.

Abstract: A power semiconductor package has an ultra thin chip with front side molding to reduce substrate resistance; a lead frame unit with grooves located on both side leads provides precise positioning for connecting numerous bridge-shaped metal clips to the front side of the side leads. The bridge-shaped metal clips are provided with bridge structure and half or fully etched through holes for relieving superfluous solder during manufacturing process.

Abstract: The invention provides a high voltage-resistant lateral double-diffused transistor. The lateral double-diffused MOS transistor includes a channel region, a gate dielectric, a gate region, a source region, a drain region, a source end extension region and a drain end S-shaped drifting region, wherein the channel region has a lateral cylindrical silicon nanowire structure, on which a layer of gate dielectric is uniformly covered, the gate region is on the gate dielectric, the gate region and the gate dielectric completely surround the channel region, the source end extension region lies between the source region and the channel region, the drain end S-shaped drifting region lies between the drain region and the channel region, the plan view of the drain end S-shaped drifting region is in the form of single or multiple S-shaped structure(s), and an insulating material with a relative dielectric constant of 1-4 is filled within the S-shaped structure(s).

Abstract: The present invention provides compounds of Formula I or II: wherein R1, R1b, R2, R3, R4, R5, R6 and R7 are defined herein. The compounds of Formula (I) or (II) and pharmaceutical compositions thereof are useful for the treatment of B-Raf-associated diseases.

Abstract: A protection method in a packet transport network is provided. A protection path is established for a service data flow borne on a shared protection ring in the method, where the protection path includes a wrapping protection path and a steering protection path. Firstly, a first service data flow is sent through the wrapping protection path. Then, a service data flow node stops sending a second service data flow subsequent to the first service data flow to the wrapping protection path, and buffers the second service data flow. When the first service data flow completely passes by the service data flow node again, the buffered second service data flow is switched from the wrapping protection path to the steering protection path.

Abstract: A MEMS device is disclosed. The MEMS device comprises a MEMS substrate. The MEMS substrate includes a first semiconductor layer connected to a second semiconductor layer with a dielectric layer in between. MEMS structures are formed from the second semiconductor layer and include a plurality of first conductive pads. The MEMS device further includes a base substrate which includes a plurality of second conductive pads thereon. The second conductive pads are connected to the first conductive pads. Finally, the MEMS device includes a conductive connector formed through the dielectric layer of the MEMS substrate to provide electrical coupling between the first semiconductor layer and the second semiconductor layer. The base substrate is electrically connected to the second semiconductor layer and the first semiconductor layer.

Abstract: A network device for building up a network connection via a high-definition multimedia interface, includes a scrambler, a descrambler, a comparator and a control unit. The scrambler is utilized for generating a transmission signal according to a first seed. The descrambler is for decoding a receiving signal to generate a second seed. The comparator is for generating a comparing result according to the first seed and the second seed. The control unit is for controlling the network connection according to the comparing result.

Abstract: Nowadays, electronic product designs are aimed at saving, due to the trend to reduce energy consumption and carbon output. Ethernet technology has also been aimed specifically at saving energy; IEEE P802.3az standard (Energy Efficient Ethernet, EEE), for Ethernet released by Broadcom is one example. The disclosure turns off the phase-locked loop when the network communication stops, effectively saving the energy consumption of the network chip under the EEE standard. In the case of network reconnection, the disclosure turns on the phase-locked loop to start the network communication through adjusting the current of current source and the parameters of a low pass filter to increase the charging speed for the reference voltage generation of the low pass filter. The disclosure then shortens the start-up time to quickly output the standard output frequency and phase of the phase-locked loop.

Abstract: Disclosed herein is a method of treating pain of a subject. The method is characterized in having the steps of providing treatments not directly onto a pain point, but onto at least one correlative treatment point, to reduce the pain of the subject.

Abstract: An embodiment of the disclosure includes a method of pitch reduction. A substrate is provided. A first material layer is formed over the substrate. A second material layer is formed on the first material layer. A hardmask layer is formed on the second material layer. A first imaging layer is formed on the hardmask layer. The first imaging layer is patterned to form a plurality of first features over the hardmask layer. The hardmask layer is etched utilizing the first imaging layer as a mask to form the first features in the hardmask layer. The first imaging layer is removed to expose the etched hardmask layer and a portion of a top surface of the second material layer. A second imaging layer is formed and the process is repeated, such that first and second features are alternating with a pitch substantially half the original pitch.

Abstract: Methods, apparatuses and systems directed to account-based access to media services are described. A media access controller server validates a voucher for an offer of network content and issues a token permitting access to the content. A media access manager server validates the token and invokes a playlist-generation step at a publishing point, and returns the content to a user's media player. A custom plug-in on the media access manager may enforce terms of service imposed by the publisher, such as a maximum number of simultaneous streams permitted by a single voucher, or a time window for use of the voucher. Streams whose voucher's end time has expired are terminated by the plug-in.

Abstract: A method for fabricating a surrounding-gate silicon nanowire transistor with air sidewalls is provided. The method is compatible with the CMOS process; the introduced air sidewalls can reduce the parasitic capacitance effectively and increase the transient response characteristic of the device, thus being applicable to a high-performance logic circuit.

Abstract: Novel peptides that inhibit the release of microparticles from cells are disclosed. The peptide contains at least one VGFPV motif at the N-terminal and has a length of 10-100 amino acids. Also disclosed is polynucleotide encoding the peptide, expression vectors carrying the polynucleotide, and methods for treating AIDS and tumors using the novel peptides.

Abstract: Novel chimeric moieties that show significant efficacy against cancers are provided. In certain embodiments the chimeric moieties comprise a targeting moiety attached to an interferon. In certain embodiments, the chimeric moieties comprise fusion proteins where an antibody that specifically binds to a cancer marker is fused to interferon alpha (IFN-?) or interferon beta (IFN-?).

Abstract: A method of actuating, comprising: filling at least a portion of a tube (21) with a liquid (19) containing electrolytes, the tube (21) having an inner surface that is electrically chargeable when in contact with the liquid (19); positioning an object (28) in fluid communication with the liquid in the tube; and applying an electrical field (46) along a lengthwise axis across the tube at said portion for producing a pressure in the liquid. The pressure in the liquid exerts a force on the object so as to actuate the object (28, 30). An actuator (20) is also disclosed.

Abstract: The invention provides isolated promoter polynucleotides that are root-specific and/or induced by plant parasitic nematodes. The promoters of the invention are useful for controlling expression of nucleic acids of interest in plant roots and are particularly useful for controlling transcription of nucleic acids encoding agents that disrupt formation or maintenance of parasitic nematode feeding sites in plants.

Abstract: A circuit for simultaneously analyzing performance and bugs includes a mapping unit and a USB 3.0 data flow analyzer. The mapping unit is used for mapping commands transmitted to a USB 3.0 host through a peripheral component interconnect express and internal events of the USB 3.0 host to a packet of a USB 3.0 bus. The USB 3.0 data flow analyzer is used for analyzing performance and bugs of the USB 3.0 host through the packet of the USB 3.0 bus.