Abstract: A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.

Abstract: The disclosure provides a resin composition, which includes 30 wt % to 50 wt % of a bismaleimide resin; 1 wt % to 10 wt % of an epoxy resin; 1 wt % to 10 wt % of a benzoxazine resin; 1 wt % to 5 wt % of a hardener; 10 wt % to 40 wt % of a filler; and 0.1 wt % to 3 wt % of a coupling agent, based on a total weight of the resin composition.

Abstract: The disclosure provides a resin composition, which includes 30 wt % to 60 wt % of a bismaleimide resin; 1 wt % to 10 wt % of a liquid rubber resin; and 20 wt % to 50 wt % of a filler, based on a total weight of the resin composition.

Abstract: A Bluetooth connection system is provided. The Bluetooth connection system includes a control host and a Bluetooth audio device. The control host includes a transmission unit. The Bluetooth audio device wirelessly communicates with the transmission unit, wherein the control host receives an instruction, then turns on the transmission unit and executes a search task to find the Bluetooth audio device around the control host. When the Bluetooth audio device does not return a confirmation Bluetooth connection signal to the control host, the control host sends a wake-up signal to the Bluetooth audio device to start a re-pairing procedure.

Abstract: A head-mounted eye tracking system including a light-transmitting substrate, an eye tracker, and a signal processor is provided. The eye tracker is configured to sense eyeballs of a wearer. The eye tracker includes a plurality of light-emitting devices and a plurality of sensing devices. The plurality of light-emitting devices are configured to emit a tracking beam. The plurality of sensing devices are configured to receive the tracking beam reflected by the eyeballs of the wearer. The signal processor is electrically connected to the eye tracker. The plurality of sensing devices are embedded in grooves within the light-transmitting substrate.

Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.

Abstract: An optical element driving mechanism is provided, including a movable part, a fixed part, a driving assembly, a circuit assembly, and a connecting element. The movable part is for connecting an optical element. The fixed part includes an outer frame and a base, wherein the movable part is movable relative to the fixed part. The driving assembly is for generating a driving force to drive the movable part to move relative to the fixed part. The circuit assembly is for connecting to an external circuit. The circuit assembly includes a first terminal. The outer frame is fixedly connected to the base via the connecting element.

Abstract: In an embodiment, a device includes a substrate, a first semiconductor layer that extends from the substrate, and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer includes silicon and the second semiconductor layer includes silicon germanium, with edge portions of the second semiconductor layer having a first germanium concentration, a center portion of the second semiconductor layer having a second germanium concentration, and the second germanium concentration being less than the first germanium concentration. The device also includes a gate stack on the second semiconductor layer, lightly doped source/drain regions in the second semiconductor layer, and source and drain regions extending into the lightly doped source/drain regions.

Abstract: A method for forming a semiconductor memory structure includes forming a bottom electrode layer over an active region, depositing a first high-k dielectric material on the bottom electrode layer, depositing a second high-k dielectric material on the first high-k dielectric material, annealing the first and second high-k dielectric materials, after the annealing process, depositing a third high-k dielectric material on the second high-k dielectric material, and forming a top electrode layer on the third high-k dielectric material.

Abstract: Embodiments are directed to a method of optimizing thickness of a target material film deposited on a semiconductor substrate in a semiconductor processing chamber, wherein the semiconductor processing chamber includes a magnetic assembly positioned on the semiconductor processing chamber, the magnetic assembly including a plurality of magnetic columns within the magnetic assembly. The method includes operating the semiconductor processing chamber to deposit a film of target material on a semiconductor substrate positioned within the semiconductor processing chamber, measuring an uniformity of the deposited film, adjusting a position of one or more magnetic columns in the magnetic assembly, and operating the semiconductor processing chamber to deposit the film of the target material after adjusting position of the one or more magnetic columns.

Abstract: A control device includes multi-stage control circuits. An i-th stage control circuit includes an input signal generator and an acknowledge signal generator. The input signal generator generates an i+1-th stage input signal according to a first inverted output signal and an i+1-th stage acknowledge signal. The acknowledge signal generator generates an i-th stage acknowledge signal according to an i-th stage delayed input signal and a second inverted output signal, wherein i is an integer larger than 1. Phases of the first inverted output signal and the second inverted output signal are opposite to a phase of an i-th stage output signal generated by an i-th stage pulse signal generator.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: A system and method for cleaning ring frames is disclosed. In one embodiment, a ring frame processing system includes: a plurality of blades for mechanically removing tapes and tape residues from surfaces of a ring frame; a plurality of wheel brushes for conditioning the surfaces of the ring frame; and a transport mechanism for transporting the ring frame.

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active area between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer including an upper surface; an exposed region formed in the semiconductor stack to expose the upper surface; a first protective layer covering the exposed region and a portion of the second semiconductor layer, wherein the first protective layer includes a first part with a first thickness formed on the upper surface and a second part with a second thickness formed on the second semiconductor layer, the first thickness is smaller than the second thickness; a first reflective structure formed on the second semiconductor layer and including one or multiple openings; and a second reflective structure formed on the first reflective structure and electrically connected to the second semiconductor layer through the one or multiple openings.

Abstract: A method for enhancing an expression of insulin like growth factor 1 receptor in an umbilical cord mesenchymal stem cell is provided. The method includes culturing the umbilical cord mesenchymal stem cell expressing insulin-like growth factor 1 receptor in a medium containing platelet-derived growth factor BB (PDGF-BB) to enhance the expression of insulin like growth factor 1 receptor in the umbilical cord mesenchymal stem cell.

Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,

Abstract: A flexible hybrid electronic substrate and electronic textile including the same are provided. The flexible hybrid electronic substrate includes a first region and a second region. There is a joint between the first region and the second region. Each of the first region and the second region includes at least one selected from the group consisting of the following structure features: multilayer structure feature, anisotropic structure feature and pre-strained structure feature.

Abstract: A high-speed connector includes an insulating housing, and at least one terminal assembly disposed in the insulating housing. The at least one terminal assembly includes a base body, a plurality of terminals fastened to the base body, and a metal block. A surface of the base body is recessed inward to form a fastening groove. The plurality of the terminals include a plurality of grounding terminals and differential signal terminals. Each of the plurality of the grounding terminals and the differential signal terminals has a fastening portion. The fastening portions of at least several of the plurality of the grounding terminals and the differential signal terminals are exposed to the fastening groove. The metal block is fastened in the fastening groove. The fastening portions of the grounding terminals which are exposed to the fastening groove are electrically connected with the metal block to form a grounding structure.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.