Abstract: The present invention provides a liquid crystal display with improved structure. A liquid crystal display includes a cover plate, a polarizing layer, and a liquid crystal display unit layer. The cover plate is placed on the polarizing layer, and the polarizing layer is placed on the liquid crystal display unit layer. Between the cover plate and the polarizing layer or between the polarizing layer and the liquid crystal display unit layer, an optical adhesive layer may further be included. The present invention further includes a filling layer, enabling the area between the cover plate and the polarizing layer, between the polarizing layer and the liquid crystal display unit layer, or between the polarizing layer and the optical adhesive layer to be completely filled. The present invention solves the problem of uneven appearance or structural defects in the liquid crystal display caused by difficulties in controlling the adhesive dispensing quantity.

Abstract: The present disclosure provides a beam domain based localization system, and the beam domain based localization system includes a wireless transceiver and a computer device. The computer device electrically connected to the wireless transceiver, and the computer device configured for: obtaining a beam selection result associated with a mobile device through the wireless transceiver; locating the mobile device according to the beam selection result.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.

Abstract: The present invention relates to a cell differentiation medium composition, a high secretion insulin-producing cells and a preparation method thereof. The high secretion insulin-producing cells obtained by using the cell differentiation medium composition to induce stem cell differentiated under specific conditions can secrete a large amount of insulin in a short time, and when the high-secreting insulin-producing cells are transplanted into the human body, they are not easy to be swallowed by macrophages, which can improve the survival rate of the insulin-producing cells and prolong the time of insulin secretion thereby.

Abstract: A character recognition method includes the stages as detailed in the following paragraph. An image is received, wherein the image is one in a plurality of consecutive images. A target object in the image is detected. Object information of the target object is defined according to the area ratio of the target object occupied in the image. Whether the target object in the image is the same as the target object in the previous image is determined according to the object information. Character recognition on the target object is performed to obtain a recognition result. The weighting score of the recognition result is calculated according to the object information and the recognition result. The weighting score of the recognition result of the target object in the consecutive images is accumulated until the weighting score is higher than a preset value, and the recognition result is output.

Abstract: An electronic device includes a wafer, a redistribution layer and a multi-layer insulating structure. The redistribution layer is disposed on the wafer. The multi-layer insulating structure is disposed between the wafer and the redistribution layer. The multi-layer insulating structure includes a first layer and a second layer. A Young's modulus of the first layer is different from a Young's modulus of the second layer.

Abstract: A press fit terminal includes an assembling portion, an insertion portion and a fastening portion. The assembling portion has two side walls and a connecting portion. The two side walls are disposed to two opposite sides of the assembling portion, respectively. The connecting portion is disposed in a middle of the assembling portion. The connecting portion is connected between the two side walls. Each side wall has an outer surface and an inner surface. The two outer surfaces of the two side walls are shown as two arc shapes. The two inner surfaces of the two side walls are shown as two curve surfaces. The insertion portion is connected with two ends of the two side walls of the assembling portion. The fastening portion is connected with the other two ends of the two side walls of the assembling portion.

Abstract: A preparation method of a modified naphthol resin includes the following. A nitration reaction and a hydrogenation reaction are sequentially performed on a naphthol resin to form a modified naphthol resin with an amino group in a structure. A solvent used in the hydrogenation reaction includes tetrahydrofuran, toluene, isopropanol, an amide solvent, or an above-mentioned co-solvent.

Abstract: A computer peripheral device is provided. The computer peripheral device is adapted to be installed in an electronic device supporting signal transmission of a first signal frequency. The computer peripheral device includes a human interface device (HID) and a bridging device. The HID includes a control unit to support signal transmission of a second signal frequency. The bridging device includes a first universal serial bus (USB) interface unit and a second USB interface unit. The first USB interface unit is adapted to be electrically connected to the electronic device, and supports signal transmission of the first signal frequency. The second USB interface unit is adapted to be electrically connected to the HID. The second USB interface unit regards the HID as a communication device class (CDC) device, instructs the control unit to generate an input signal at a timing corresponding to the first signal frequency, and transmits the input signal to the electronic device.

Abstract: A method performed by a UE for a conditional handover (CHO) in an MR-DC network is provided. The method receives a message including an execution condition for a PCell, a first SCG configuration for a first PSCell, an execution condition for the first PSCell, and a second SCG configuration for a second PSCell. The method stores the first SCG configuration and the second SCG configuration. The method determines whether the execution condition for the PCell is satisfied and whether the execution condition for the first PSCell is satisfied. The method applies the first SCG configuration after determining that the execution condition for the PCell is satisfied and the execution condition for the first PSCell is satisfied. The method applies the second SCG configuration after determining that the execution condition for the PCell is satisfied and the execution condition for the first PSCell is not satisfied.

Abstract: A method is provided. The method includes detaching an upper shell of a reticle pod from a base. The method further includes while the upper shell is detached from the base, blocking an inlet flow of gas from entering an interior of the reticle pod between the upper shell and the base with a use of a fluid regulating module which is in a sealed state. In the sealed state of the fluid regulating module, an opening of the fluid regulating module is covered with a sealing film. The method also includes removing a reticle positioned on the base to a process tool. In addition, the method includes performing a lithography operation in the process tool with the use of the reticle.

Abstract: An apparatus for PVD is provided. The apparatus includes a chamber, a pedestal disposed in the chamber to accommodate a wafer, and a ring. The ring includes a ring body having a first top surface and a second top surface, and a barrier structure disposed between the first top surface and the second top surface. The barrier structure can further include at least a first portion and a second portion separated from each other. The second vertical distance is equal to or greater than the first vertical distance.

Abstract: A resin composition includes a resin mixture. The resin mixture includes a first resin polymerized by a monomer mixture including styrene, divinylbenzene and ethylene; a second resin including polyphenylene ether resin modified by bismaleimide; a third resin block polymerized by a monomer mixture including styrene and butadiene; and an acenaphthylene.

Abstract: A driving environment monitoring system includes a line-of-sight analysis module, an environment analysis module and a processor. The line-of-sight analysis module captures an eye image of a driver; and analyzes the eye image to obtain a plurality of line-of-sight probabilities that a line-of-sight of the eye image is located in a plurality of partitions. The environment analysis module is configured to capture an environment image around the mobile vehicle; and analyze the environment image to obtain a plurality of object probabilities that at least one object of the environment image is located in the partitions. The processor is configured to obtain an integration probability of the line-of-sight probability and the object probability in each partition; obtain a forward direction of the mobile vehicle; and send a reminder signal based on the integration probability of the partition where the forward direction is located being greater than a preset probability.

Abstract: A circulating current suppression method of a power system having a plurality of power modules is provided. Each power module includes a high-voltage bus, a low-voltage bus and a balance circuit having a neutral voltage. The circulating current suppression method includes: in each balance circuit, disposing a first capacitor electrically coupled between the high-voltage bus and the neutral voltage, and disposing a second capacitor electrically coupled between the neutral voltage and the low-voltage bus; acquiring a current effective value of an input of each power module; if detecting that the current effective value of at least one power module doesn't remain at a current reference value, determining that a circulating current occurs in the at least one power module; and operating the balance circuit of the at least one power module to charge the first capacitor or the second capacitor to regulate the neutral voltage for suppressing the circulating current.

Abstract: A layout optimization method and a semiconductor wafer are provided. The method includes: generating adjusted patterns corresponding to a first layout pattern; generating a layout optimization test group according to the adjusted patterns, wherein the layout optimization test group includes first and second clusters of test pattern arrays, the first cluster include first test pattern arrays in accordance with one of the adjusted patterns and different from one another in terms of capacity, and the second cluster include second test pattern arrays in accordance with another one of the adjusted patterns and different from one another in terms of capacity; forming the layout optimization test group on a wafer; performing an electrical inspection on the first and second pattern arrays, and determining a best manufacturing solution from the adjusted patterns according to the electrical inspection.

Abstract: A heat-dissipating element having a casing having a closed fluid space. At least a part of the fluid space is filled with a coolant fluid, and the coolant fluid is transformed between a liquid phase and a gas phase by an environment temperature transferred by the casing.

Abstract: A polishing apparatus for double-sided polishing of semiconductor wafers including a first platen, a second platen, a wafer carrier, and a controller is disclosed. The controller is configured to perform operations including determining whether a batch of the semiconductor wafers is loaded on the wafer carrier for double-sided polishing and retrieving specification for the batch of semiconductor wafers. The operations include based on the retrieved specification, determining an amount of tuning required for one or more flatness control parameters, and based on the amount of tuning required for the one or more flatness control parameters, identifying, or generating a recipe to perform the double-sided polishing on the batch of the semiconductor wafers. The operations include storing statistical process control (SPC) feedback data in a database to perform one or more additional iterations of the double-sided polishing on the batch of the semiconductor wafers.

Abstract: An unmanned ground vehicle (UGV) includes one or more motors configured to drive one or more wheels of the UGV, an obstacle sensor, a memory storing instructions, and a processor coupled to the one or more motors, the obstacle sensor, and the memory. The processor is configured to execute the instructions to cause the UGV to obtain location information of multiple navigation points; calculate a navigation path based on the obtained location information; drive the one or more motors to navigate the UGV along the navigation path; detect, by the obstacle sensor, whether one or more obstacles exist while navigating the UGV, and if detected, determine location information of the one or more obstacles; and if the one or more obstacles are detected by the obstacle sensor, update the navigation path based on determined location information of the one or more obstacles.

Abstract: A memory device in an integrated circuit is provided, including an input/output (I/O) circuit, a first memory segment and a second memory segment that separated from the first memory segment in a first direction, a first pair of data lines on a first side of the integrated circuit, extending in the first direction and configured to couple the first memory segment to the I/O circuit, and a second pair of data lines separated from the first pair of data lines in a second direction, different from the first direction, on a second side, opposite to the first side, of the integrated circuit, and configured to couple the second memory segment to the I/O circuit. A first width of the first pair of data lines is different from a second width of the second pair of data lines.