Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: A quadrant alternate switching phase interpolator includes first and second multiplexer circuits, a phase interpolator circuitry, and a controller circuitry. The first multiplexer circuit outputs one of first and second clock signals to be a first signal in response to first and third bits in a quadrant control code. The second multiplexer circuit outputs one of third and fourth clock signals to be a second signal in response to second and fourth bits in the quadrant control code, and the first, the third, the second, and fourth clock signals are sequentially different in phase by 90 degrees. The phase interpolator circuitry generates an output clock signal in response to the first and the second signals and phase control bits. The controller circuitry performs a bit-shift operation on the phase control bits to adjust a phase of the output clock signal.

Abstract: A method including the step contacting an olefin, an alcohol, a metallosilicate catalyst and a solvent, wherein the solvent comprises structure (I): wherein R1 and R2 are each selected from the group consisting of an aryl group and an alkyl group with the proviso that at least one of R1 and R2 is an aryl group, further wherein n is 1-3.

Abstract: A method of wireless signal transmission management includes transmitting a plurality of data packets to tethering equipment from user equipment to tethering equipment, determining a size of each of the plurality of data packets by the tethering equipment, designating data packets of the plurality of data packets having a specific range of sizes as control signal packets by the tethering equipment, and prioritizing in transmitting the control signal packets to a cellular network by the tethering equipment.

Abstract: A plating system and a method thereof are disclosed. The plating system performs a N-stage plating drilling filling process in which a M-th stage plating drilling filling process with a M-th current density is performed on a hole of a substrate for a M-th plating time to form a M-th plating layer on the to-be-plated layer, wherein N is a positive integer equal to or greater than 3, and M is a positive integer positive integer in a range of 1 to N. Therefore, the technical effect of providing a higher drilling filling rate than conventional plating filling technology under a condition that a total thickness of plating layers is fixed can be achieved.

Abstract: A method for manufacturing a semiconductor device is described. The method includes the following steps. A low-dimensional material (LDM) layer is formed on a semiconductor substrate, wherein the LDM layer includes sublayers stacked upon one another. A plasma treatment is performed to the LDM layer to transform at least one sublayer into an oxide layer, wherein the plasma treatment is performed under a temperature equivalent to or lower than about 80 degrees Celsius. At least one electrode is disposed over the oxide layer.

Abstract: An electronic device is provided. The electronic device includes a base and a conductive layer that is disposed on the base and patterned by a plurality of processes. The plurality of processes include providing a mask substrate. The mask substrate includes a first substrate and a patterned substrate. In the cross-sectional view, the width of the first substrate is greater than or equal to the width of the patterned substrate. The plurality of processes include arranging the mask substrate and the base correspondingly. The plurality of processes also include performing exposure and development processes on the conductive layer for patterning the conductive layer, and removing the mask substrate.

Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first stacked nanostructure and a second stacked nanostructure formed over a substrate. The semiconductor device structure includes a first gate structure formed over the first stacked nanostructure, and the first gate structure includes a first portion of a gate dielectric layer and a first portion of a filling layer. The semiconductor device structure includes a second gate structure formed over the second stacked nanostructure, and the second gate structure includes a second portion of the gate dielectric layer and a second portion of the filling layer. The semiconductor device structure includes a first isolation layer between the first gate structure and the second gate structure, wherein the first isolation layer has an extending portion which is formed in a recess between the gate dielectric layer and the filling layer.

Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.

Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.

Abstract: A shell structure includes a shell and a shielding cover. The shell has an accommodating space, the accommodating space has an inner wall, and the inner wall has a first buckling portion. The shielding cover is arranged in the accommodating space, the shielding cover has an outer wall, the outer wall corresponds to the inner wall, and the outer wall has a second buckling portion corresponding to the first buckling portion. The first buckling portion and the second buckling portion are buckled with each other to limit relative degrees of freedom of the shell and the shielding cover.

Abstract: Disclosed herein are related to an integrated circuit including a semiconductor layer. In one aspect, the semiconductor layer includes a first region, a second region, and a third region. The first region may include a circuit array, and the second region may include a set of interface circuits to operate the circuit array. A side of the first region may face a first side of the second region along a first direction. The third region may include a set of header circuits to provide power to the set of interface circuits through metal rails extending along a second direction. A side of the third region may face a second side of the second region along the second direction. In one aspect, the first side extending along the second direction is shorter than the second side extending along the first direction, and the metal rails are shorter than the first side.

Abstract: A low numerical aperture fiber output diode laser module, which having several independent diode lasers, and collimated and converged the light beam, for the coupling the light to the core optical fiber with a core diameter of 105 um and a numerical aperture of 0.12. Compared with general products with a numerical aperture of 0.22, the light output angle is reduced to 55%, and use a general blue laser diode for verification. Use an optical software for facilitating the design and optimization of the parameters of the optical lens module.

Abstract: An optical lens assembly includes, in order from the object side to the image side: a stop, a first lens, a second lens, a third lens, and an IR band-pass filter, wherein half of a maximum view angle (field of view) of the optical lens assembly is HFOV, a radius of curvature of an image-side surface of the third lens is R6, a focal length of the optical lens assembly is f, and following condition is satisfied: ?6.83<HFOV/(R6/f)<44.10, which is favorable to the thinning and large field of view of the lens assembly.

Abstract: A projection device, a projection system and a method for calibrating projected image are provided. The projection device and an external projection device the same image source and respectively project an image and another image corresponding to the image source. The same portion of the image source where the two images overlap each other forms an overlapping area. The projection device includes a lens, a light shielding member and a processor. The light shielding member is disposed on the lens. The processor controls the light shielding member to selectively shade a partial area of the lens according to the brightness of the image source, wherein the partial area corresponds to the overlapping area.

Abstract: An electrical connector includes: a longitudinal insulating housing; plural differential-pair signal terminals and plural grounding terminals arranged in a longitudinal direction of the insulating housing; and a grounding plate module retained in the insulating housing, wherein the grounding plate module has an electromagnetic interference (EMI) absorber and a grounding plate retained in the EMI absorber, and the grounding plate defines plural grounding fingers extending out of the EMI absorber to contact with corresponding grounding terminals.

Abstract: Systems and methods of conducting a bar code scan using an imaging-based bar code scan device are provided. In one exemplary embodiment, a method is performed by an imaging-based bar code device that includes processing circuitry, an optical lens assembly having an image sensor and an optical lens with a focused region at a certain distance in front of the optical lens along an optical axis of the optical lens, a plurality of light emitting elements configured proximate the optical lens and laterally offset from the optical axis. The method includes sending, by the processing circuitry, to each light emitting element, an indication to enable that light emitting element to project a light beam towards the optical axis in the focused region so that the light beams overlap when a target bar code is in the focused region and nonoverlap when a target bar code is outside the focused region.

Abstract: A manufacturing method of a semiconductor device includes: providing a semiconductor stack layer, wherein the semiconductor stack layer includes a first type semiconductor layer, a quantum well layer, and a second type semiconductor layer stacked in sequence; growing an aluminum nitride layer on the second type semiconductor layer; and annealing the aluminum nitride layer to achieve quantum well intermixing.

Abstract: A system and a method for pathological voice recognition and a computer-readable storage medium are provided. The method for pathological voice recognition comprises: capturing a voice signal; processing the voice signal using Mel Frequency Cepstral Coefficients (MFCC) algorithm to obtain an MFCC spectrogram; extracting features from the MFCC spectrogram; and predicting a pathological condition of the voice signal based on the features of the MFCC spectrogram of the voice signal by a deep learning model, the pathological condition of the voice signal including normal, unilateral vocal paralysis, adductor spasmodic dysphonia, vocal atrophy, and organic vocal fold lesions.