Patents by Inventor An Tsai

An Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for pairing authentication between a vehicle and a mobile device
    Patent number: 10609745
    Abstract: A method for pairing authentication between a vehicle and a mobile device is proposed. After a host computer of the vehicle is operated to send out a vehicle identification code for pairing and the mobile device is operated to select the vehicle identification code, the host computer enables both of a host display of the vehicle and the mobile device to display a pairing code at the same time. After a pairing procedure is performed within a predetermined pairing operation period, the host computer completes pairing authentication between the host computer and the mobile device.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: March 31, 2020
    Assignee: KWANG YANG MOTOR CO., LTD.
    Inventors: Yi-Yang Tsai, Hsi-Kun Chen
  • Body information analysis apparatus and method of estimating remaining capacity of cosmetic product thereof
    Patent number: 10606882
    Abstract: A body information analysis apparatus (10) and method of estimating remaining capacity of cosmetic product thereof are disclosed. The method includes following steps of: controlling a body information analysis apparatus (10) to configure a plurality of cosmetic product data respectively corresponding to different cosmetic products; updating an remaining capacity of each cosmetic product data according to a use record of the body information analysis apparatus (10) and a reference consumption amount of each cosmetic product data; sending a reminder message when the remaining capacity of any of the plurality of cosmetic product data is less than a safety capacity; and, retrieving feedback data corresponding to the cosmetic product data and updating the remaining capacity of the cosmetic product data according to the feedback data.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: March 31, 2020
    Assignee: CAL-COMP BIG DATA, INC.
    Inventors: Shyh-Yong Shen, Min-Chang Chi, Ching-Sheng Tsai
  • Manufacturing method of redistribution layer
    Patent number: 10607856
    Abstract: A manufacturing method of a redistribution layer is provided. The method includes the following steps. A patterned sacrificial layer is formed on a carrier. An actuate angle is formed between a side wall of the patterned sacrificial layer and the carrier. A first conductive layer is formed. The first conductive layer includes a plurality of first portions formed on the carrier and a plurality of second portions formed on the patterned sacrificial layer. The patterned sacrificial layer and the second portions of the first conductive layer are removed from the carrier. Another manufacturing method of a redistribution layer is also provided.
    Type: Grant
    Filed: June 18, 2017
    Date of Patent: March 31, 2020
    Assignee: Powertech Technology Inc.
    Inventors: Kun-Yung Huang, Chih-Fu Lung, Shih-Chi Li, Mei-Chen Lee, Chung-Hao Tsai, Chi-Liang Wang
  • Manufacturing method of semiconductor device
    Patent number: 10607891
    Abstract: A manufacturing method of a semiconductor device includes following steps. First gate structures and second gate structures are formed on a first region and a second region of a semiconductor substrate respectively. A spacing distance between the second gate structures is larger than that between the first gate structures. A first ion implantation is preformed to form a first doped region between the first gate structures. A second ion implantation is performed to form a second doped region between the second gate structures. A tilt angle of the second ion implantation is larger than that of the first ion implantation. An implantation dose of the second ion implantation is lower than that of the first ion implantation. An etching process is performed to at least partially remove the first doped region to form a first recess and at least partially remove the second doped region to form a second recess.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: March 31, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jiun-Lin Yeh, Hsueh-Chih Tseng, Chia-Chen Tsai, Ta-Kang Lo
  • VERTICAL CONSTRUCTIONS FOR DEVICES HAVING A DRIFT REGION
    Publication number: 20200098909
    Abstract: Structures for laterally-diffused metal-oxide-semiconductor devices and drain-extended metal-oxide-semiconductor devices, as well as methods of forming laterally-diffused metal-oxide-semiconductor devices and drain-extended metal-oxide-semiconductor devices. A gate electrode is arranged to extend about a semiconductor fin projecting from a substrate. A drain region is arranged in the substrate, and a source region is coupled with the semiconductor fin. The source region is arranged over the semiconductor fin. A drift region is arranged in the substrate between the drain region and the semiconductor fin. The drain region, source region, and drift region have a given conductivity type. The drift region has a lower electrical conductivity than the drain region.
    Type: Application
    Filed: September 21, 2018
    Publication date: March 26, 2020
    Inventors: Robert Gauthier, JR., Souvick Mitra, Alain Loiseau, Tsai Tsung-Che, Mickey Yu, You Li
  • NOVEL INTEGRATION SCHEME FOR BREAKDOWN VOLTAGE ENHANCEMENT OF A PIEZOELECTRIC METAL-INSULATOR-METAL DEVICE
    Publication number: 20200098517
    Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.
    Type: Application
    Filed: May 21, 2019
    Publication date: March 26, 2020
    Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
  • PROJECTION APPARATUS AND PROJECTION METHOD THEREOF
    Publication number: 20200099900
    Abstract: A projection apparatus and a projection method thereof are provided. The projection apparatus includes a frame refresh rate conversion chip, a spatial light modulation circuit and a control circuit. The frame refresh rate conversion chip performs frame refresh rate conversion on a first video signal to generate a second video signal. The control circuit is coupled to the frame refresh rate conversion chip and the spatial light modulation circuit, and adjusts a resolution and a frame refresh rate of a projected image generated by the spatial light modulation circuit according to a frame refresh rate of the second video signal.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 26, 2020
    Applicant: Coretronic Corporation
    Inventors: Yen-Hsien Su, Yi-Chang Tsai
  • MULTIPLE ZONE PAD CONDITIONING DISK
    Publication number: 20200094375
    Abstract: A pad conditioning disk configured to condition a polishing pad of a chemical mechanical polishing tool including a plurality of zones comprising cutting elements that selectively engage the polishing pad based on a positioning of the plurality of zones, is provided. An associated chemical mechanical polishing (CMP) tool and method for conditioning a polishing pad during a chemical mechanical polishing process is also provided.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 26, 2020
    Inventors: Stan D. Tsai, Luke S. Tsai
  • METHOD FOR FORMING CHIP PACKAGE STRUCTURE
    Publication number: 20200098693
    Abstract: A method for forming a chip package structure is provided. The method includes forming a conductive pillar over a redistribution structure. The method includes bonding a chip to the redistribution structure. The method includes forming a molding layer over the redistribution structure. The molding layer surrounds the conductive pillar and the chip, and the conductive pillar passes through the molding layer. The method includes forming a cap layer over the molding layer and the conductive pillar. The cap layer has a through hole exposing the conductive pillar, and the cap layer includes fibers. The method includes forming a conductive via structure in the through hole. The conductive via structure is connected to the conductive pillar.
    Type: Application
    Filed: November 5, 2018
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shin-Puu JENG, Techi WONG, Po-Yao LIN, Ming-Chih YEW, Po-Hao TSAI, Po-Yao CHUANG
  • COPOLYESTER RESIN FOR PREPARING A LOW-MELTING COPOLYESTER FIBER, THE LOW-MELTING COPOLYESTER FIBER PREPARED THEREFROM, AND PROCESS FOR PREPARING THE LOW-MELTING COPOLYESTER FIBER
    Publication number: 20200095382
    Abstract: A copolyester resin for preparing a low-melting copolyester fiber is made by compounding a first copolyester with a second copolyester in a weight ratio of the first copolyester to the second copolyester of from 94:6 to 98:2. The first copolyester is obtained by subjecting terephthalic acid, ethylene glycol, isophthalic acid, and diethylene glycol to a copolymerization, and the second copolyester is obtained by subjecting terephthalic acid, ethylene glycol, and neopentyl glycol to another copolymerization.
    Type: Application
    Filed: May 13, 2019
    Publication date: March 26, 2020
    Applicant: FAR EASTERN NEW CENTURY CORPORATION
    Inventors: Hsiang-Chin TSAI, Shih-Hsiung CHEN, Lewis YU
  • INTEGRATED HEATER (AND RELATED METHOD) TO RECOVER DEGRADED PIEZOELECTRIC DEVICE PERFORMANCE
    Publication number: 20200098969
    Abstract: In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.
    Type: Application
    Filed: May 16, 2019
    Publication date: March 26, 2020
    Inventors: Alexander Kalnitsky, Chun-Ren Cheng, Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yan-Jie Liao
  • CURSOR CONTROL SYSTEM AND CURSOR CONTROL METHOD
    Publication number: 20200097130
    Abstract: The present invention relates to a cursor control system, including a first electronic device, a second electronic device, and a mouse. The mouse is wirelessly connected to the first electronic device and the second electronic device and may move a cursor on a first working desktop corresponding to the first electronic device or a second working desktop corresponding to the second electronic device. When receiving a drive signal from the mouse, the first electronic device displays a jump image on the first working desktop. When the cursor is moved to the jump image, the mouse may transmit a switching signal to the second electronic device according to a masking signal from the first electronic device, so that the second electronic device can display the cursor on the second working desktop.
    Type: Application
    Filed: December 6, 2018
    Publication date: March 26, 2020
    Inventors: Cheng-Yi Tsai, Ying-Che Tseng, Shi-Jie Zhang, Che-Yen Huang
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20200098689
    Abstract: A semiconductor structure includes a substrate including a first surface; a dielectric layer disposed over the first surface of the substrate; a first conductive line surrounded by the dielectric layer and extended over the first surface of the substrate; a conductive via disposed over the first conductive line and extended through the dielectric layer; and a cross section of the conductive via parallel to the first surface of the substrate, wherein the first conductive line includes a second surface at least partially interfaced with the conductive via, the second surface of the first conductive line includes a first end, a second end opposite to the first end and a first central axis passing through the first end and the second end, the cross section of the conductive via includes a second central axis parallel to the first central axis and a third central axis orthogonal to the second central axis.
    Type: Application
    Filed: December 6, 2018
    Publication date: March 26, 2020
    Inventors: CHI-TA LU, CHI-MING TSAI
  • GATE STACK TREATMENT
    Publication number: 20200098640
    Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.
    Type: Application
    Filed: April 5, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductorr Manufacturing Co., Ltd.
    Inventors: Chandrashekhar Prakash SAVANT, Chia-Ming Tsai, Ming-Te Chen, Shih-Chi Lin, Zack Chong, Tien-Wei Yu
  • SEMICONDUCTOR PACKAGE
    Publication number: 20200098736
    Abstract: A semiconductor package includes a first optical transceiver, a second optical transceiver, a third optical transceiver, and a plasmonic waveguide. The first optical transceiver includes at least one optical input/output portion for transmitting and receiving optical signal. The second optical transceiver is stacked on the first optical transceiver. The third optical transceiver includes at least one optical input/output portion for transmitting and receiving optical signal. The third optical transceiver is stacked on the second optical transceiver. The plasmonic waveguide penetrates through the second optical transceiver and optically couples the at least one optical input/output portion of the first optical transceiver and the at least one optical input/output portion of the third optical transceiver.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • DISPOSABLE MULTI-CHANNEL BIO-ANALYSIS CARTRIDGE AND CAPILLARY ELECTROPHORESIS SYSTEM FOR CONDUCTING BIO-ANALYSIS USING SAME
    Publication number: 20200096479
    Abstract: A multi-channel bio-separation system configured to utilize a cartridge that has a individual, separate integrated reagent (i.e., a separation buffer) reservoir dedicated for each separation channel. The multiple channels may have different characteristics, such as different separation medium of different chemistries, different separation length, different channel sizes and internal coatings. In one embodiment, the cartridge does not include integrated detection optics. Not all channels need to be operative. One or more of the channels in the cartridge may be “dummy channels” that are not operative (e.g., not provided with a capillary tube). A capillary tube may be routed between the reservoir/electrode (anode) of one channel to an electrode (cathode) in another channel, thus allowing a longer length of capillary tube to be used to define a longer separation channel to improve resolution.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Shou-Kuan TSAI, Varouj D. AMIRKHANIAN
  • DATA PLANE SEMANTICS FOR SOFTWARE VIRTUAL SWITCHES
    Publication number: 20200097269
    Abstract: Examples may include a method of compiling a declarative language program for a virtual switch. The method includes parsing the declarative language program, the program defining a plurality of match-action tables (MATs), translating the plurality of MATs into intermediate code, and parsing a core identifier (ID) assigned to each one of the plurality of MATs. When the core IDs of the plurality of MATs are the same, the method includes connecting intermediate code of the plurality of MATs using function calls, and translating the intermediate code of the plurality of MATs into machine code to be executed by a core identified by the core IDs.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Yipeng WANG, Ren WANG, Tsung-Yuan C. TAI, Jr-Shian TSAI, Xiangyang GUO
  • GROUP ESTABLISHMENT METHOD AND SYSTEM FOR MULTI-LOGIN AUTHENTICATION USER AND SWITCHING DEVICE, ELECTRONIC DEVICE AND STORAGE MEDIUM THEREOF
    Publication number: 20200100097
    Abstract: A method of group establishment for multi-login authentication user implemented by a switching device, the method comprises steps of receiving, by the switching device, group configuration information, carried by a first network signal, of at least one communication device including an eSIM card, wherein the group configuration information includes eSIM card information; and establishing, by the switching device, a communication group list which allows the communication devices on the list to interacts each other via the switching device for data sharing.
    Type: Application
    Filed: June 4, 2019
    Publication date: March 26, 2020
    Inventors: Yong-Ping ZHENG, Shih-Kuang TSAI
  • MULTI-IMAGE PROJECTOR AND ELECTRONIC DEVICE HAVING MULTI-IMAGE PROJECTOR
    Publication number: 20200099919
    Abstract: The present invention provides a projector including a laser module and a lens module, wherein the lens module includes a plurality of lens and a plurality of diffractive optical elements. In the operations of the projector, the laser module is arranged to generate at least one laser beam; each of the lenses is arranged to receive one of the at least one laser beam to generate a collimated laser beam; and the diffractive optical elements correspond to the lenses, respectively, and each of the diffractive optical elements is arranged to receive the collimated laser beam from the corresponding lens to generate an image. The images generated by the diffractive optical elements form a projected image of the projector. By using the projector of the present invention, the projected image may have higher resolution or field of view that is advantageous for the 3D sensing system.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Biing-Seng Wu, Han-Yi Kuo, Bo-Han Lyu, Yin-Dong Lu, Kuan-Ming Chen, Meng-Ko Tsai
  • Electrical adaptor
    Patent number: D879716
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 31, 2020
    Assignee: KWANG YANG MOTOR CO., LTD.
    Inventors: Ping-Huan Chuang, Yu-Jiun Tsai