Abstract: An embedded flash memory device includes a gate stack, which includes a bottom dielectric layer extending into a recess in a semiconductor substrate, and a charge storage layer over the bottom dielectric layer. The charge storage layer includes a portion in the recess. The gate stack further includes a top dielectric layer over the charge storage layer, and a metal gate over the top dielectric layer. Source and drain regions are in the semiconductor substrate, and are on opposite sides of the gate stack.

Abstract: An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.

Abstract: A manufacturing method for a semiconductor device first provides a substrate having at least a first transistor formed thereon. The first transistor includes a first conductivity type. The first transistor further includes a first metal gate and a protecting layer covering sidewalls of the first metal gate. A portion of the first metal gate is removed to form a first recess and followed by removing a portion of the protecting layer to form a second recess. Then, an etch stop layer is formed in the second recess.

Abstract: The disclosure herein describes an edge device of a network for distributed policy enforcement. During operation, the edge device receives an initial packet for an outgoing traffic flow, and identifies a policy being triggered by the initial packet. The edge device performs a reverse lookup to identify at least an intermediate node that is previously traversed by the initial packet and traffic parameters associated with the initial packet at the identified intermediate node. The edge device translates the policy based on the traffic parameters at the intermediate node, and forwards the translated policy to the intermediate node, thus facilitating the intermediate node in applying the policy to the traffic flow.

Abstract: A method for preparing series of terpolymer of poly (diphenyl ether sulfone) and poly (diphenyl ether diphenyl sulfone) comprises: adding high temperature organic solvent, stirring and heating; sequentially adding 4,4?-dihydroxydiphenyl, 4,4?-dichlorodiphenyl sulfone and 4,4?-Bis(4-chlorophenyl)sulfonyl-1,1?-biphenyl; after all the monomers are completely dissolved, heating to 100° C. and adding alkali metal carbonate salt-forming agent which is 5-10 mol % more than the amount of 4,4?-dihydroxydiphenyl added, and subsequently adding xylene; continuously heating and salt-forming reaction begins in the system, and controlling the temperature at 190˜210° C.; then heating to 230˜236° C., and maintaining for 3-4 hours to obtain polymer viscous liquid; and refining the polymer viscous liquid to obtain a terpolymer containing different structural units in the molecular chain, wherein the Tg of the terpolymer can be regulated by changing the ratio of the two dichloro-containing monomers.

Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.

Abstract: The present disclosure discloses a converter system, which at least includes the first and second back-to-back converters. The first back-to-back converter includes a first rectifier module and a first inverter module. The first rectifier module is used to convert a first AC voltage to a first DC voltage. The first inverter module is used to convert the first DC voltage to a second AC voltage. The second back-to-back converter includes a second rectifier module and a second inverter module. The second rectifier module is used to convert the first AC voltage to a second DC voltage. The second inverter module is used to convert the second DC voltage to the second AC voltage. The converter system can suppress the circular current through the synchronous operation of the first and second rectifiers or the synchronous operation of the first and second inverters.

Abstract: The present disclosure discloses a pixel unit circuit and an OLED display apparatus. The pixel unit circuit comprises a first sub-circuit module, a second sub-circuit module, a first capacitor and OLED. An input of the first sub-circuit module is connected to a data line; another input of the first sub-circuit module is connected to an output of the second sub-circuit module and a first terminal of the OLED; an output of the first sub-circuit module is connected to an input/output of the second sub-circuit module via the first capacitor; a voltage difference between positive power supply and negative power supply of a backboard is applied between an input of the second sub-circuit module and a second terminal of the OLED. The pixel unit circuit can compensate the aging of OLED devices, the non-uniformity of threshold voltage of TFT driving transistors, and IR Drop of the power supply of the backboard.

Abstract: The presently claimed invention provides a method for stitching a plurality of images together in a way with least memory and CPU usage, and minimum file input and output, while still possessing fast computation speed to avoid post-scan delay for whole slide viewing and good stitching quality. The method of the present invention comprises the steps of calculating featureness of each candidate strip of a image by applying a mathematical transformation, calculating offset of the strip with correlation maximum location, calculating stitching reliability of the candidate strip from the pre-defined weighted function of its featureness and the correlation coefficients of each matching block, and determining optimal stitching path with stitching reliability.

Abstract: System and method for providing a multiple die interposer structure. An embodiment comprises a plurality of interposer studs in a molded interposer, with a redirection layer on each side of the interposer. Additionally, the interposer studs may be initially attached to a conductive mounting plate by soldering or wirebond welding prior to molding the interposer, with the mounting plate etched to form one of the redirection layers. Integrated circuit dies may be attached to the redirection layers on each side of the interposer, and interlevel connection structures used to mount and electrically connect a top package having a third integrated circuit to the interposer assembly.

Abstract: A light emitting device includes a substrate, light emitting units, an insulation layer, a current distribution layer and a reflective layer. The substrate has an upper surface. The light emitting units are disposed on the upper surface and include at least one first light emitting diode (LED) and at least one second LED. A first side wall of the first LED is adjacent to a second side wall of the second LED so as to define a concave portion exposing a portion of the upper surface. The insulation layer at least covers the first side wall and the second side wall. The current distribution layer covers the concave portion and at least covers a portion of the second LED. The reflective layer covers the current distribution layer and is electrically connected to the first LED and the second LED.

Abstract: Some embodiments provide a method for encoding video pictures captured by a mobile device having at least first and second cameras. The method identifies a first rate controller parameter that is based on at least a first value that quantifies one characteristic of the first camera. The method uses the first rate controller parameter to configure a set of rate controllers to adjust a bit rate for encoding video pictures captured by the first camera. The method identifies a second rate controller parameter that is based on at least a second value that quantifies the same characteristic of the second camera. The first and second values are different, and the difference causes the first and second rate controller parameters to be different. The method uses the second rate controller parameter to configure the set of rate controllers to adjust a bit rate for encoding video pictures captured by the second camera.

Abstract: Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving one or more keywords at a web application that are used to search for documents of a first type. The documents are accessible by a user via an account of the user based upon user permissions. Search results are provided based upon the keywords and include links to one or more documents of the first type. A selection one or more of the links is received. Selecting the links logs data that includes an indication that the documents were selected. A request for a list of most or recently selected documents of the first type for the user is received. The list of most or recently selected documents of the first type is based upon an aggregation of the logged data, and the list of most selected documents of the first type is provided.

Abstract: The disclosure discloses a method, system and RN for processing UCI on a backhaul link. The method comprises that: the RN determines Q? which is the number of the coded modulation symbols of the backhaul UCI according to the number of SC-FDMA symbols occupied by a GP, wherein the GP comprises RN state switch time deltaT and/or the time interval deltat which is reserved for avoiding the interference caused by RN uplink transmission, and deltaT is the switch time required by the RN to switch from an uplink reception state to an uplink transmission state and/or from the uplink transmission state to the uplink reception state; and the RN codes the backhaul UCI into a Q=Q?×Qm bits sequence, wherein Qm is the number of bits comprised in each coded modulation symbol in the modulation order of the backhaul uplink subframe. The disclosure improves the performance of the system.

Abstract: A portable optical sensor for measuring surface strain in an object, such as pre-stressed concrete articles, is provided. The sensor is a modular device comprising at least first and second modules, each of which includes a laser and image sensor. When placed adjacent to the object, the laser of each module illuminates respective, spaced-apart areas of the object's surface and each module's image sensor captures at least a portion of the light reflected from the illuminated area and generates a speckle image of the area. Speckle images of the areas taken at various times and/or under various object stress conditions are compared to arrive at a surface strain measurement for the object.

Abstract: One or more locations in a plurality of data bit sequences that do not satisfy parity and are associated with data bit sequences that are unable to be successfully error correction decoded are determined. Soft information associated with the determined locations is modified and error correction decoding using the modified soft information is performed.

Abstract: A SMPS having a switch; an output port coupled to a load, configured to provide a voltage feedback signal and a current feedback signal; an on-time generator, having an input end coupled to the current feedback signal, and having an output end providing a time signal indicating a time period; and a PWM generator, having a first input end coupled to the voltage feedback signal, a second input end coupled to the time signal, and an output end providing a PWM signal that is coupled to the control end of the switch, and wherein the PWM signal is configured to turn ON the switch when the voltage feedback signal is lower than a threshold voltage, and the PWM signal is configured to turn OFF the switch after the time period.

Abstract: A light source module including a light guide plate, a plurality of light emitting devices, and a plurality of first reflective devices is provided. The light guide plate has a plurality of through holes and a light emitting surface. The through holes pass through the light emitting surface. Each of the through holes has a first side wall and a second side wall opposite the first side wall. At least one of the light emitting devices is disposed in each of the through holes. Each of the light emitting devices is capable emitting a light beam. The light beam enters the light guide plate from the first side wall of the through hole which the light emitting device is disposed in and leaves the light guide plate from the light emitting surface. The first reflective devices are disposed on the second side walls of the through holes.

Abstract: Processes for making light to current converter devices are provided. The processes can be used to make light to current converter devices having P-N junctions located on only the top surface of the cell, located on the top surface and symmetrically or asymmetrically along a portion of the inner surface of the via holes, located on the top surface and full inner surface of the via holes, or located on the top surface, full inner surface of the via holes, and a portion of the bottom surface of the cell. The processes may isolate the desired P-N junction by etching the emitter, forming a via hole after forming the emitter, using a barrier layer to protect portions of the emitter from etching, or using a barrier layer to prevent the emitter from being formed on portions of the substrate.