Patents by Inventor An Yang

An Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177982
    Abstract: An uncertainty weighted average of the equalized amounts of two or more quantifier ions is calculated from a quantitation experiment itself. n known i ions of a compound are mass analyzed over time in each of m different samples, producing n XIC peaks for each of the m samples. A reference ion j is selected that is a j ion of the n i ions or a hypothetical ion j. A ratio r(j,i) of a peak area of the j ion to a peak area of each ion of the n i ions is calculated for each of the m samples, producing m r(j,i) ratios for each of the n i ions. An expected ratio rq(j,i) is calculated for each ion of the n i ions from the m r(j,i) ratios for each of the n i ions. For each sample, the uncertainty weighted average is calculated using rq(j,i).
    Type: Application
    Filed: March 14, 2022
    Publication date: May 30, 2024
    Inventors: Gordana Ivosev, Stephen A. Tate, Yang Kang, Nic G. Bloomfield
  • Publication number: 20240177659
    Abstract: A display substrate and a display apparatus are provided. The display substrate includes a plurality of sub-pixels, and pixel driving circuits of sub-pixels form M pixel rows and N pixel columns; the display substrate includes a first initialization signal line and a second initialization signal line; the pixel driving circuits include a plurality of transistors and a light-emitting device, and the transistors include driving transistors; the light-emitting device includes a first electrode, wherein the first initialization signal line is respectively electrically connected with the mth row of sub-pixels, and is configured to transmit a first initialization signal to a control electrode of a driving transistor of the mth row of sub-pixels; the second initialization signal line is respectively electrically connected with the (m?1)th row of sub-pixels, and is configured to transmit a second initialization signal to a first electrode of a light-emitting device of the (m?1)th row of sub-pixels.
    Type: Application
    Filed: September 2, 2021
    Publication date: May 30, 2024
    Inventors: Biao LIU, Tinghua SHANG, Huijuan YANG, Hongwei MA
  • Publication number: 20240178014
    Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 30, 2024
    Inventors: Keren J. KANARIK, Samantha SiamHwa TAN, Yang PAN, Jeffrey MARKS
  • Publication number: 20240178545
    Abstract: An electronic device includes a middle frame, an antenna board, and a fastener. The middle frame is provided with a mounting cavity, and an inner wall of the mounting cavity is provided with a limiting portion. The antenna board is placed in the mounting cavity, and the fastener is capable of being clamped between the limiting portion and an upper end face of the antenna board, to restrict the antenna board from moving upward along a depth direction of the mounting cavity. This application can resolve a problem of operation inconvenience in antenna board mounting when a mounting space for mounting the antenna board is small, and can further resolve a problem that a peripheral component is easily damaged in a mounting process.
    Type: Application
    Filed: August 25, 2022
    Publication date: May 30, 2024
    Inventors: Kai QU, Lijun YANG, Baojun GAO
  • Publication number: 20240178147
    Abstract: A power module includes an upper substrate, a lower substrate, a first semiconductor chip, a first spacer configured to electrically connect a first metal layer to a second metal layer, a second spacer configured to electrically connect the first semiconductor chip to the first metal layer, a first connection layer having conductivity, disposed between the upper substrate and the lower substrate, and configured to allow the first spacer and the second spacer to penetrate the first connection layer, and a power lead.
    Type: Application
    Filed: April 14, 2023
    Publication date: May 30, 2024
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Han Jin DO, Jin Myeong YANG, Sung Won PARK
  • Publication number: 20240178745
    Abstract: An alternating current control system includes a zero crossing detector, an alternating current solid state relay, a constant current driver, and a microcontroller connected to the zero crossing detector and the constant current driver. The zero crossing detector and the alternating current solid state relay are connected to an alternating current power source, a first control pin of the microcontroller receives a zero crossing detection signal outputted by the zero crossing detector, a second control pin of the microcontroller receives a switch state signal, and a third control pin of the microcontroller is connected to the constant current driver and outputs a control signal. Based on the switch state signal and the zero crossing detection signal, the microcontroller adjusts a level of the control signal and controls an electrical connection between the alternating current solid state relay and the alternating current power source.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 30, 2024
    Inventors: Hui-Chiang Yang, CHIA-CHANG LIN
  • Publication number: 20240177749
    Abstract: A memory device includes a base die that includes a data signal bump configured to receive a data signal, a first memory stack that includes first memory dies sequentially stacked on the base die, and a second memory stack that includes second memory dies sequentially stacked on the base die and spaced from the first memory stack in a direction parallel to an upper surface of the base die. The base die is configured to selectively provide the data signal received through the data signal bump to one of the first memory stack or the second memory stack based on a selection signal.
    Type: Application
    Filed: July 19, 2023
    Publication date: May 30, 2024
    Inventors: Yunseok Yang, Eungchang Lee, Seula Ryu, Minhwan An, Yunkyeong Jeong, Chul-Hwan Choo
  • Publication number: 20240178663
    Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY, Ramkumar SIVAKUMAR, Dongyang TANG, Chienchung YANG
  • Publication number: 20240178065
    Abstract: One example provides a method that includes directing a first laser beam at a surface of a semiconductor substrate along a scribe street thereof. The first laser beam is focused inside the substrate to form a first modified region, which is offset from a second modified region in a direction orthogonal to a scan direction of the first laser beam, and a first crack extending between the second modified region and the first modified region. A second laser beam is directed at the surface to form a third modified region, which is offset from the first and second modified regions, and a second crack extending from the first modified region to the surface. The first and second cracks form a zigzag-shaped crack within the substrate along the scribe street.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Yang LIU, Hao ZHANG, Venkataramanan KALYANARAMAN, Lejuan ZHOU
  • Publication number: 20240178334
    Abstract: A method for manufacturing a photovoltaic module and a photovoltaic module are provided. The method includes: laying a front plate, a first adhesive layer on the front plate, and a plurality of cells on the first adhesive layer, and pre-curing the first adhesive layer between the front plate and the plurality of cells; forming a plurality of cell strings by connecting the plurality of cells through a plurality of solder strips after the first adhesive layer is pre-cured; and laying a second adhesive layer on the plurality of cell strings, laying a back plate on the second adhesive layer, and curing the second adhesive layer between the back plate and the plurality of cell strings, to form the photovoltaic module.
    Type: Application
    Filed: October 19, 2023
    Publication date: May 30, 2024
    Inventors: Shiliang HUANG, Zhiqiu GUO, Yingli GUAN, Jingguo YANG
  • Publication number: 20240178067
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A singulation process is performed to a semiconductor wafer for forming semiconductor dies and includes a first cutting step, a thinning step, and a second cutting step. The first cutting step is configured to form first openings in the semiconductor wafer by etching. A portion of the semiconductor wafer is located between each first opening and a back surface and removed by the thinning step. Each first opening penetrates through the semiconductor wafer after the thinning step. The second cutting step is configured to form second openings. Each second opening penetrates through the semiconductor wafer for separating the semiconductor dies. A semiconductor die includes two first side surfaces opposite to each other and two second side surfaces opposite to each other. A roughness of each first side surface is different from a roughness of each second side surface.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Po-Yu Yang
  • Publication number: 20240178341
    Abstract: The method for preparing a solar cell includes providing a substrate having a first surface and a second surface opposite to the first surface; forming a doped layer and a first passivation layer stacked sequentially in a direction away from the substrate on the first surface; forming a second passivation layer on the second surface; forming multiple first grid line electrodes arranged at intervals on the surface of the first passivation layer away from the substrate, and forming multiple second grid line electrodes arranged at intervals on the surface of the second passivation layer away from the substrate; performing a laser processing on the multiple first grid line electrodes and an adjacent region of the multiple first grid line electrodes, and applying a reverse current between the multiple first grid line electrodes and the multiple second grid line electrodes.
    Type: Application
    Filed: June 2, 2023
    Publication date: May 30, 2024
    Inventors: Wenqi LI, Shijie ZHAO, Xiaowen ZHANG, Jie YANG, Xinyu ZHANG
  • Publication number: 20240177727
    Abstract: The present disclosure provides a method performed by an electronic device and an apparatus. A method performed by an electronic device may include: obtaining an audio signal comprising a speech signal uttered by at least one sound source; determining a target audio segment of the audio signal, wherein the target audio segment is determined based on a speech quality of at least one audio segment, wherein the at least audio segment is divided from the audio signal; and performing speech separation on the audio signal based on the target audio segment to obtain at least one separated speech signal corresponding to the at least one sound source.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wei LIU, Lei YANG, Lufen TAN
  • Publication number: 20240178363
    Abstract: The present invention provides a method for stabilizing an electrode using a functional layer, the electrode and applications thereof, which generates a beneficial electrolyte interface layer on the surface of the negative electrode after charging and discharging, and a protective buffer layer to form an alloy that facilitates the deposition of dense lithium on the negative current collector, significantly extending the life of the battery.
    Type: Application
    Filed: February 22, 2023
    Publication date: May 30, 2024
    Inventors: Bing-Joe Hwang, Sheng-Chiang Yang, Semaw Kebede Merso, Wei-Nien Su, She-Huang Wu
  • Publication number: 20240178409
    Abstract: Provided are an oxidation-resistant catalyst for fuel cells, a manufacturing method thereof, and a fuel cell including the same. In the case of the catalyst for a fuel cell according to the present disclosure, the fuel cell catalyst according to the present disclosure has oxidation-resistant features of a metal oxide while maintaining the electrical conductivity of a carbon support. Accordingly, catalytic activity of platinum particles, which are the active points in fuel cells, can be improved, and metal oxides can prevent platinum particles from directly interacting with carbon supports, thereby resolving the problem of carbon corrosion at the platinum/carbon interface.
    Type: Application
    Filed: August 18, 2023
    Publication date: May 30, 2024
    Applicant: KORENS RTX Co., Ltd.
    Inventors: Dae Soo YANG, Hyean Yeol PARK, Tong Hyun KANG
  • Publication number: 20240178137
    Abstract: A method for determining antenna rule for a radio-frequency (RF) device includes the steps of forming a gate structure on a substrate, forming a source/drain region adjacent to the gate structure, forming a first metal routing on the source/drain region, and then forming a second metal routing on the gate structure. Preferably, a sum of an area of the first metal routing and an area of the second metal routing divided by an area of the gate structure is less than a ratio.
    Type: Application
    Filed: February 10, 2023
    Publication date: May 30, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: XINGXING CHEN, Ching-Yang Wen, Purakh Raj Verma
  • Publication number: 20240178381
    Abstract: The present disclosure relates to a positive electrode active material for a lithium-sulfur battery, and the positive electrode active material of the present disclosure includes a sulfur-carbon composite, wherein the sulfur-carbon composite includes a porous carbon material and a sulfur-based material disposed on at least a portion of an inside of pores and a surface of the porous carbon material, wherein the sulfur-based material includes at least one of sulfur (S8) or a sulfur compound, and wherein the porous carbon material satisfies one or more of the following conditions: (1) a sum of particle size D10 and particle size D90 is 60 ?m or less; and (2) a broadness factor (BF) satisfying Equation 1 is 7 or less: Broadness factor (BF)=(particle size D90 of the porous carbon material)/(particle size D10 of the porous carbon material)??[Equation 1].
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Inventors: Min-Su Kim, Da-Young Kang, Bong-Soo Kim, Seung-Bo Yang
  • Publication number: 20240178533
    Abstract: The present invention relates to a battery cell for evaluating an internal short circuit, and a method for evaluating using the battery cell, wherein an internal short circuit state of a battery cell can be easily induced and, at the same time, an effective internal short circuit evaluation is possible, and the battery cell comprising: first and second electrodes which comprise a coated region on which an electrode mixture layer is coated on a metal current collector and a non-coated region on which an electrode mixture layer is not coated, and which comprise first and second electrode tabs which protrude in one direction from the coated region and do not have an electrode mixture layer coated thereon.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 30, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Sol Nip LEE, Jeong Min YANG
  • Publication number: 20240178406
    Abstract: A solid oxide cell includes a fuel electrode, an air electrode, and an electrolyte disposed between the fuel electrode and the air electrode. The fuel electrode may include a porous metal body having pores and a barrier portion disposed in the pores of the porous metal body, and the barrier portion has a shape of at least one of a sheet shape and a flake shape.
    Type: Application
    Filed: July 3, 2023
    Publication date: May 30, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong Suong Yang, Byung Chul Jang, Jung Deok Park, Hyeg Soon An, Su Beom Park, Jae Seok Yi, Jung Hyun Lee
  • Publication number: 20240177969
    Abstract: Embodiments provided herein generally include apparatus, plasma processing systems, and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having three MOSFETs and three series-connected capacitors. The capacitors are connected across a DC power supply and, depending on the value of the capacitors, voltage across each of them may be varied. Each of the top two capacitors is followed by a diode. The bottom capacitor is connected to the ground. The drain terminal of each MOSFET is connected to higher potential end of the series connected capacitors. Each MOSFET is followed by a diode and the cathode ends of the diodes are connected together. An electrode is connected between the common cathode and ground.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kartik RAMASWAMY, Yue GUO, Yang YANG, Fernando SILVEIRA, A.N.M. Wasekul AZAD