Patents by Inventor An-Yu CHANG

An-Yu CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11822251
    Abstract: Methods and materials for making a semiconductor device are described. The method includes forming a photoresist over a substrate. The photoresist includes an acid-labile group (ALG) connected to a polar unit. The method also includes exposing the photoresist to a radiation beam, baking the photoresist and performing a developing process to the photoresist.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang
  • Patent number: 11822237
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Chih-Cheng Liu, Yi-Chen Kuo, Jia-Lin Wei, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
  • Publication number: 20230367216
    Abstract: A method according to the present disclosure includes providing a substrate, depositing an underlayer over the substrate, depositing a photoresist layer over the underlayer, exposing a portion of the photoresist layer and a portion of the underlayer to a radiation source according to a pattern, baking the photoresist layer and underlayer, and developing the exposed portion of the photoresist layer to transfer the pattern to the photoresist layer. The underlayer includes a polymer backbone, a polarity switchable group, a cross-linkable group bonded to the polymer backbone, and photoacid generator. The polarity switchable group includes a first end group bonded to the polymer backbone, a second end group including fluorine, and an acid labile group bonded between the first end group and the second end group. The exposing decomposes the photoacid generator to generate an acidity moiety that detaches the second end group from the polymer backbone during the baking.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Inventors: Chien-Chih Chen, Ching-Yu Chang
  • Publication number: 20230369109
    Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Yu Shih Wang, Chun-I Tsai, Shian Wei Mao, Ken-Yu Chang, Ming-Hsing Tsai, Wei-Jung Lin
  • Publication number: 20230369471
    Abstract: Circuit devices and methods of forming the same are provided. In one embodiment, a method includes receiving a workpiece that includes a substrate and a fin extending from the substrate, forming a first ferroelectric layer on the fin, forming a dummy gate structure over a channel region of the fin, forming a gate spacer over sidewalls of the dummy gate structure, forming an inter-level dielectric layer over the workpiece, removing the dummy gate structure to expose the first ferroelectric layer over the channel region of the fin, and forming a gate electrode over the exposed first ferroelectric layer over the channel region of the fin.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Bo-Feng Young, Chih-Yu Chang, Sai-Hooi Yeong, Chi On Chui, Chih-Hao Wang
  • Publication number: 20230367218
    Abstract: In a method, a resist material is dispensed through a tube of a nozzle of a resist pump system on a wafer. The tube extends from a top to a bottom of the nozzle and has upper, lower, and middle segments. When not dispensing, the resist material is retracted from the lower and the middle segments, and maintained in the upper segment of the tube. When retracting, a first solvent is flown through a tip of the nozzle at the bottom of the nozzle to fill the lower segment of the tube with the first solvent and to produce a gap in the middle segment of the tube between the resist material and the first solvent. The middle segment includes resist material residues on an inner surface wall of the tube and vapor of the first solvent. The vapor of the first solvent prevents the resist material residues from drying.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 16, 2023
    Inventors: Ya-Ching CHANG, Chen-Yu LIU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20230369048
    Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Inventors: Jia-Lin WEI, Ming-Hui Weng, Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Yahru Cheng, Jr-Hung Li, Ching-Yu Chang, Tze-Liang Lee, Chi-Ming Yang
  • Patent number: 11813601
    Abstract: A thermal cracking system includes a thermal cracking treatment unit whose technical features allow a regenerated oil or a regenerated auxiliary gas to be extracted for use as a combustible material in the combustion process of the thermal cracking treatment unit, thereby contributing substantially to recycling and reuse in order to achieve sustainable development of the environment effectively.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: November 14, 2023
    Assignee: ENERSOURCE TECHNOLOGY CORP.
    Inventor: Yao-Yu Chang
  • Patent number: 11817384
    Abstract: The present disclosure provides an interconnect structure and a method for forming an interconnect structure. The method for forming an interconnect structure includes forming a bottom metal line in a first interlayer dielectric layer, forming a second interlayer dielectric layer over the bottom metal line, exposing a top surface of the bottom metal line, increasing a total surface area of the exposed top surface of the bottom metal line, forming a conductive via over the bottom metal line, and forming a top metal line over the conductive via.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shuen-Shin Liang, Ken-Yu Chang, Hung-Yi Huang, Chien Chang, Chi-Hung Chuang, Kai-Yi Chu, Chun-I Tsai, Chun-Hsien Huang, Chih-Wei Chang, Hsu-Kai Chang, Chia-Hung Chu, Keng-Chu Lin, Sung-Li Wang
  • Patent number: 11817489
    Abstract: Negative capacitance field-effect transistor (NCFET) and ferroelectric field-effect transistor (FE-FET) devices and methods of forming are provided. The gate dielectric stack includes a ferroelectric gate dielectric layer. An amorphous high-k dielectric layer and a dopant-source layer are deposited sequentially followed by a post-deposition anneal (PDA). The PDA converts the amorphous high-k layer to a polycrystalline high-k film with crystalline grains stabilized by the dopants in a crystal phase in which the high-k dielectric is a ferroelectric high-k dielectric. After the PDA, the remnant dopant-source layer may be removed. A gate electrode is formed over remnant dopant-source layer (if present) and the polycrystalline high-k film.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Yang Lai, Chun-Yen Peng, Chih-Yu Chang, Bo-Feng Young, Sai-Hooi Yeong, Chi On Chui
  • Publication number: 20230359124
    Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
  • Publication number: 20230359592
    Abstract: In an approach, a processor obtains a configuration file of a distributed file system federation, the configuration file comprising a list of a plurality of subclusters within the distributed file system federation and migration trigger factors for the plurality of subclusters. A processor determines a list of one or more source subclusters and a list of to-be-migrated directories in the one or more source subclusters based on a scanning result of the plurality of subclusters and the migration trigger factors in the configuration file. A processor generates a migration plan to migrate the to-be-migrated directories from the one or more source subclusters to one or more target subclusters in the distributed file system federation.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventors: Jun Guo, Xiang Yu Yang, Deng Xin Luo, Na Liu, Chen Yu Chang, Qin Dong Yin
  • Patent number: 11806232
    Abstract: A prosthetic heart valve configured to replace a native heart valve and having a support frame configured to be reshaped into an expanded form in order to receive and/or support an expandable prosthetic heart valve therein is disclosed, together with methods of using same. Interlocking members or flexible loops are included to limit expansion of the valve to one or two valve sizes, for example, with a 2-mm gap between each valve size. The valve may include an internal structural band with overlapped free ends having structure for limiting expansion, or external loops of suture may be added to the fabric covering which limits expansion.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: November 7, 2023
    Assignee: EDWARDS LIFESCIENCES CORPORATION
    Inventors: Brian S. Conklin, Da-Yu Chang
  • Patent number: 11807978
    Abstract: The embodiments are and include an apparatus, system and method for a liquid level monitoring dispenser for association with a liquid filled consumable. The apparatus, system and method may include: a receiver for receiving the consumable upon inversion thereof; at least one electrical contact within the receiver for communicative association with conductive strips on the consumable; a sensing module communicative with the at least one electrical contact and having associated therewith firmware for converting signals associated with the conductive strips and received at the electrical contact to an indication of the liquid level; a communications module for communicating the liquid level to at least a user display and over at least one network; a power module for powering at least the sensing module and the communications module; and at least one dispensing output in fluid communication with the consumable and capable of dispensing the liquid from the consumable to modify the liquid level.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: November 7, 2023
    Assignee: Nypro Inc.
    Inventors: Amanda Williams, Julio Danel Oropeza, Yu-Chang Lee, Ying Hao Lee, Martin Johnson, Marc Theeuwes, Stefan Vaes, Toon Diels
  • Patent number: 11810492
    Abstract: The embodiments of the disclosure provide a method for determining an ambient light luminance, a host, and a computer readable storage medium. The method includes: obtaining a first frame and a second frame, wherein the first frame comprises a plurality of first regions of interest (ROI), the second frame comprises a plurality of second ROIs, and the first ROIs respectively correspond to the second ROIs; in response to determining that the first ROIs comprise at least one specific ROI satisfying a predetermined condition and at least one first candidate ROI, obtaining at least one second candidate ROI among the second ROIs, wherein the at least one second candidate ROI respectively correspond to the at least one specific ROI; and determining the ambient light luminance based on the at least one first candidate ROI and the at least one second candidate ROI.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: November 7, 2023
    Assignee: HTC Corporation
    Inventors: Chia-Wei Yu, Ping-Chang Hsieh, Chin-Yu Chang
  • Patent number: 11811222
    Abstract: An electrostatic discharge (ESD) protection circuit including a detection circuit, a voltage-divider element, and a discharge element is provided. The detection circuit is coupled between a first power line and a second power line. In response to an ESD event, the detection circuit enables a turn-on signal. The voltage-divider element is coupled between the first power line and a third power line and receives the turn-on signal. The discharge element is coupled between the second and third power lines. In response to the turn-on signal being enabled, the first discharge element discharges an ESD current.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: November 7, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yeh-Ning Jou, Chieh-Yao Chuang, Hsien-Feng Liao, Ting-Yu Chang, Chih-Hsuan Lin, Chang-Min Lin, Shao-Chang Huang, Ching-Ho Li
  • Publication number: 20230350302
    Abstract: A method for forming a semiconductor structure is provided. The method includes forming a photoresist layer over a substrate. The photoresist layer includes a polymer, a photoacid initiator and a crosslinker containing at least two crosslinking sites. The photoresist layer is then cured to crosslink the polymer, thereby forming a crosslinked polymer. Next, the photoresist layer is exposed to a radiation. An acid produced from exposure of the photoacid generator de-crosslinks the crosslinked polymer in exposed portions of the photoresist layer. The exposed portions of the photoresist layer are subsequently removed to form a patterned photoresist layer.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Inventors: Yu-Chung SU, Lilin CHANG, Jia-Lin WEI, Ching-Yu CHANG
  • Publication number: 20230352092
    Abstract: Systems, apparatuses and methods may provide for technology that issues a program pulse to a selected subblock of a NAND memory array, conducts a pulse recovery phase after the program pulse, and shuts down unselected subblocks in the NAND memory array during the pulse recovery phase.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Inventors: Tarek Ameen, Shantanu Rajwade, Hsiao Yu Chang, Rohit Shenoy, Pranav Chava, Xin Sun, Pratyush Chandrapati
  • Publication number: 20230350295
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a photoresist layer over a substrate, exposing the photoresist layer to radiation to form a pattern therein, and selectively removing portions of the photoresist layer that are not exposed to the radiation to form a patterned photoresist layer. The photoresist layer comprises a fluorine-containing polymer, a crosslinker and a photoactive compound.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Inventors: Li-Po YANG, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20230343582
    Abstract: A composition, comprising: a carbon backbone polymer; a first crosslinker; and a second crosslinker. The first crosslinker partially crosslinks the carbon backbone polymer at a temperature ranging from 100° C. to 170° C., and the second crosslinker crosslinks the carbon backbone polymer at a temperature ranging from 180 20 C. to 300° C. The first crosslinker is one or more selected from the group consisting of A-(OR)x, A-(NR)x, where A is a monomer, oligomer, or a second polymer having a molecular weight ranging from 100 to 20,000, R is an alkyl group, cycloalkyl group, cycloalkylepoxy group, or C3-C15 heterocyclic group, OR is an alkyloxy group, cycloalkyloxy group, carbonate group, alkylcarbonate group, alkyl carboxylate group, tosylate group, or mesylate group, NR is an alkylamide group or an alkylamino group, and x ranges from 2 to 1000. The second crosslinker is different from the first crosslinker.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Jing Hong HUANG, Ching-Yu CHANG, Wei-Han LAI