Abstract: Described is a receiver for improving end-to-end efficiency in a device-to-device wireless charging system using resonant energy transfer through an inductive link. The receiver includes an efficiency controller which dynamically tracks a maximum efficiency point and controls an impedance between an inductive coupling of the receiver and a receiver rectifier circuit such that an impedance seen by the inductive coupling is an impedance which maximizes (or nearly maximizes) efficiency of the inductively coupled wireless power transfer operation.

Abstract: An apparatus for wirelessly charging an energy storage element is disclosed. The apparatus includes a coil, a set of capacitors, a set of switches and a rectifier. The coil, which has multiple taps, is capable of being energized by a charger via inductive coupling. The capacitors are connected to the coil at various taps. The switches selectively connect the rectifier to at least one of the capacitors to charge the energy storage element that is connected to the rectifier.

Abstract: Systems and methods for improved packet throughput using partial packets are provided in which data recovery of partial packets of a plurality of received coded packets is performed across the plurality of received coded packets. The plurality of received coded packets, including the received partial packets, can be buffered in a memory and used in recovering the data for the partial packets. As soon as the total number of received packets (including valid and partial) becomes greater than the generation size, a decoding process can be attempted utilizing the partial packets as part of the redundancy used for data recovery. During the decoding process, the received packets are evaluated across packets instead of on a per-packet basis.

Abstract: An integrated circuit chip and method for EEG monitoring. In one embodiment, the integrated circuit chip includes an Analog Front End cell in communication with an electrode and a Classification Processor wherein a signal received from the electrode is processed by the Classification Engine cell and designated as seizure or non-seizure. In another embodiment, the Analog Front End cell includes an amplifier cell in communication with an electrode; and an ASPU cell in communication with the amplifier cell. In yet another embodiment, the Classification Processor includes a DBE Channel Controller cell; a Feature Extraction Engine Processor cell, and a Classification Engine cell in communication with the Feature Extraction Engine Processor cells and the DBE Channel Controller cell.

Abstract: A system and method is provided for ordering intervals rLPS and rMPS of a range to increase speed of binary symbol decoding in a binary arithmetic decoder. The method comprises the steps of: placing rLPS at a bottom of the range; enabling subtraction for rMPS to occur in parallel with comparison of rLPS and offset; and, reducing time that it takes to decode a bin. A method is also provided for performing context selection for a given syntax element, comprising the steps of: first, comparing information regarding properties of neighboring pixels with a threshold; second, adding results of threshold comparison of neighboring pixels, to provide a secondary result; and using the secondary result to select a context.

Abstract: Systems and methods for improved packet throughput using partial packets are provided in which data recovery of partial packets of a plurality of received coded packets is performed across the plurality of received coded packets. The plurality of received coded packets, including the received partial packets, can be buffered in a memory and used in recovering the data for the partial packets. As soon as the total number of received packets (including valid and partial) becomes greater than the generation size, a decoding process can be attempted utilizing the partial packets as part of the redundancy used for data recovery. During the decoding process, the received packets are evaluated across packets instead of on a per-packet basis.

Abstract: An apparatus for wirelessly charging an energy storage element is disclosed. The apparatus includes a coil, a set of capacitors, a set of switches and a rectifier. The coil, which has multiple taps, is capable of being energized by a charger via inductive coupling. The capacitors are connected to the coil at various taps. The switches selectively connect the rectifier to at least one of the capacitors to charge the energy storage element that is connected to the rectifier.

Abstract: A system and method for providing high throughput entropy coding contains the steps of: dividing syntax elements of video into one or more group of syntax elements; placing each group into a separate partition, resulting in more than one partition; and processing more than one of the more than one partition in parallel using entropy coding.

Abstract: A system and method is provided for ordering intervals rLPS and rMPS of a range to increase speed of binary symbol decoding in a binary arithmetic decoder. The method comprises the steps of: placing rLPS at a bottom of the range; enabling subtraction for rMPS to occur in parallel with comparison of rLPS and offset; and, reducing time that it takes to decode a bin. A method is also provided for performing context selection for a given syntax element, comprising the steps of: first, comparing information regarding properties of neighboring pixels with a threshold; second, adding results of threshold comparison of neighboring pixels, to provide a secondary result; and using the secondary result to select a context.

Abstract: A system and method for providing high throughput entropy coding contains the steps of: dividing syntax elements of video into one or more group of syntax elements; placing each group into a separate partition, resulting in more than one partition; and processing more than one of the more than one partition in parallel using entropy coding.

Abstract: A memory device includes a plurality of cells comprising CMOS structures. A non-strobed regenerative sense-amplifier (NSR-SA) is coupled to the cells and employs offset compensation and avoids strobe timing uncertainty to increase read-access speeds.

Abstract: A memory device includes a plurality of cells comprising CMOS structures. A non-strobed regenerative sense-amplifier (NSR-SA) is coupled to the cells and employs offset compensation and avoids strobe timing uncertainty to increase read-access speeds.

Abstract: A method and network architecture for implementing an energy efficient network. The network includes a plurality of nodes that collect and transmit data that are ultimately routed to a base station. The network nodes form a set of clusters with a single node acting as a cluster-head. The cluster-head advertises for nodes to join its cluster, schedules the collection of data within a cluster, and then transmits the data to the base station. A cluster can intelligently combine data from individual nodes. After a period of operation, the clusters are reformed with a different set of nodes acting as cluster-heads. The network provides an increased system lifetime by balancing the energy use of individual nodes.

Abstract: A digital compensation filtering technique is provided that enables indirect phase locked loop modulation with a digital modulation data stream having a bandwidth that exceeds, perhaps by an order of magnitude, the bandwidth characteristic of the phase locked loop. A modulation data receiver is provided for receiving from a modulation source digital input modulation data having a bandwidth that exceeds the cutoff frequency characteristic of the phase locked loop frequency response. A digital processor is coupled to the modulation data receiver for digitally processing the input modulation data to amplify modulation data at frequencies higher than the phase locked loop cutoff frequency.

Abstract: A method of digital filtering and a digital filter having a filter response with a predetermined filter order. The filter response produces a predetermined set of filtered output samples defining an output signal from a received input signal. The difference between the power associated with the input signal and the power associated with the output signal is calculated. The filter order of the filter response is varied based on the calculated difference of power in order to change the filter response.