Patents by Inventor Anbang Yao

Anbang Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240143333
    Abstract: Methods and systems are disclosed using an execution pipeline on a multi-processor platform for deep learning network execution. In one example, a network workload analyzer receives a workload, analyzes a computation distribution of the workload, and groups the network nodes into groups. A network executor assigns each group to a processing core of the multi-core platform so that the respective processing core handle computation tasks of the received workload for the respective group.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Liu Yang, Anbang YAO
  • Patent number: 11972545
    Abstract: The present disclosure provides an apparatus and method of guided neural network model for image processing. An apparatus may comprise a guidance map generator, a synthesis network and an accelerator. The guidance map generator may receive a first image as a content image and a second image as a style image, and generate a first plurality of guidance maps and a second plurality of guidance maps, respectively from the first image and the second image. The synthesis network may synthesize the first plurality of guidance maps and the second plurality of guidance maps to determine guidance information. The accelerator may generate an output image by applying the style of the second image to the first image based on the guidance information.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: April 30, 2024
    Assignee: INTEL CORPORATION
    Inventors: Anbang Yao, Ming Lu, Yikai Wang, Shandong Wang, Yurong Chen, Sungye Kim, Attila Tamas Afra
  • Publication number: 20240127408
    Abstract: Embodiments are generally directed to an adaptive deformable kernel prediction network for image de-noising. An embodiment of a method for de-noising an image by a convolutional neural network implemented on a compute engine, the image including a plurality of pixels, the method comprising: for each of the plurality of pixels of the image, generating a convolutional kernel having a plurality of kernel values for the pixel; generating a plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, each of the plurality of offsets to indicate a deviation from a pixel position of the pixel; determining a plurality of deviated pixel positions based on the pixel position of the pixel and the plurality of offsets; and filtering the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel.
    Type: Application
    Filed: November 20, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventors: Anbang Yao, Ming Lu, Yikai Wang, Xiaoming Chen, Junjie Huang, Tao Lv, Yuanke Luo, Yi Yang, Feng Chen, Zhiming Wang, Zhiqiao Zheng, Shandong Wang
  • Patent number: 11948224
    Abstract: One embodiment provides an apparatus comprising a memory stack including multiple memory dies and a parallel processor including a plurality of multiprocessors. Each multiprocessor has a single instruction, multiple thread (SIMT) architecture, the parallel processor coupled to the memory stack via one or more memory interfaces. At least one multiprocessor comprises a multiply-accumulate circuit to perform multiply-accumulate operations on matrix data in a stage of a neural network implementation to produce a result matrix comprising a plurality of matrix data elements at a first precision, precision tracking logic to evaluate metrics associated with the matrix data elements and indicate if an optimization is to be performed for representing data at a second stage of the neural network implementation, and a numerical transform unit to dynamically perform a numerical transform operation on the matrix data elements based on the indication to produce transformed matrix data elements at a second precision.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 2, 2024
    Assignee: Intel Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Sara S. Baghsorkhi, Anbang Yao, Kevin Nealis, Xiaoming Chen, Altug Koker, Abhishek R. Appu, John C. Weast, Mike B. Macpherson, Dukhwan Kim, Linda L. Hurd, Ben J. Ashbaugh, Barath Lakshmanan, Liwei Ma, Joydeep Ray, Ping T. Tang, Michael S. Strickland
  • Patent number: 11934934
    Abstract: An apparatus to facilitate optimization of a convolutional neural network (CNN) is disclosed. The apparatus includes optimization logic to receive a CNN model having a list of instructions and including pruning logic to optimize the list of instructions by eliminating branches in the list of instructions that comprise a weight value of 0.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: March 19, 2024
    Assignee: Intel Corporation
    Inventors: Liwei Ma, Elmoustapha Ould- Ahmed-Vall, Barath Lakshmanan, Ben J. Ashbaugh, Jingyi Jin, Jeremy Bottleson, Mike B. Macpherson, Kevin Nealis, Dhawal Srivastava, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman, Altug Koker, Abhishek R. Appu
  • Publication number: 20240086693
    Abstract: Methods and systems for budgeted and simplified training of deep neural networks (DNNs) are disclosed. In one example, a trainer is to train a DNN using a plurality of training sub-images derived from a down-sampled training image. A tester is to test the trained DNN using a plurality of testing sub-images derived from a down-sampled testing image. In another example, in a recurrent deep Q-network (RDQN) having a local attention mechanism located between a convolutional neural network (CNN) and a long-short time memory (LSTM), a plurality of feature maps are generated by the CNN from an input image. Hard-attention is applied by the local attention mechanism to the generated plurality of feature maps by selecting a subset of the generated feature maps. Soft attention is applied by the local attention mechanism to the selected subset of generated feature maps by providing weights to the selected subset of generated feature maps in obtaining weighted feature maps.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 14, 2024
    Inventors: Yiwen GUO, Yuqing Hou, Anbang YAO, Dongqi Cai, Lin Xu, Ping Hu, Shandong Wang, Wenhua Cheng, Yurong Chen, Libin Wang
  • Patent number: 11907843
    Abstract: Systems, apparatuses and methods may provide for conducting an importance measurement of a plurality of parameters in a trained neural network and setting a subset of the plurality of parameters to zero based on the importance measurement. Additionally, the pruned neural network may be re-trained. In one example, conducting the importance measurement includes comparing two or more parameter values that contain covariance matrix information.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 20, 2024
    Assignee: Intel Corporation
    Inventors: Anbang Yao, Yiwen Guo, Yurong Chen
  • Patent number: 11887001
    Abstract: An apparatus and method are described for reducing the parameter density of a deep neural network (DNN). A layer-wise pruning module to prune a specified set of parameters from each layer of a reference dense neural network model to generate a second neural network model having a relatively higher sparsity rate than the reference neural network model; a retraining module to retrain the second neural network model in accordance with a set of training data to generate a retrained second neural network model; and the retraining module to output the retrained second neural network model as a final neural network model if a target sparsity rate has been reached or to provide the retrained second neural network model to the layer-wise pruning model for additional pruning if the target sparsity rate has not been reached.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: January 30, 2024
    Assignee: INTEL CORPORATION
    Inventors: Anbang Yao, Yiwen Guo, Lin Xu, Yan Lin, Yurong Chen
  • Publication number: 20240013506
    Abstract: An example apparatus for mining multi-scale hard examples includes a convolutional neural network to receive a mini-batch of sample candidates and generate basic feature maps. The apparatus also includes a feature extractor and combiner to generate concatenated feature maps based on the basic feature maps and extract the concatenated feature maps for each of a plurality of received candidate boxes. The apparatus further includes a sample scorer and miner to score the candidate samples with multi-task loss scores and select candidate samples with multi-task loss scores exceeding a threshold score.
    Type: Application
    Filed: September 6, 2023
    Publication date: January 11, 2024
    Inventors: Anbang Yao, Yun Ren, Hao Zhao, Tao Kong, Yurong Chen
  • Publication number: 20240013047
    Abstract: Dynamic conditional pooling for neural network processing is disclosed. An example of a storage medium includes instructions for receiving an input at a convolutional layer of a convolutional neural network (CNN); receiving an input sample at a pooling stage of the convolutional layer; generating a plurality of soft weights based on the input sample; performing conditional aggregation on the input sample utilizing the plurality of soft weights to generate an aggregated value; and performing conditional normalization on the aggregated value to generate an output for the convolutional layer.
    Type: Application
    Filed: December 24, 2020
    Publication date: January 11, 2024
    Applicant: Intel Corporation
    Inventors: Dongqi CAI, Anbang YAO, Yurong CHEN, Xiaolong LIU
  • Patent number: 11869171
    Abstract: Embodiments are generally directed to an adaptive deformable kernel prediction network for image de-noising. An embodiment of a method for de-noising an image by a convolutional neural network implemented on a compute engine, the image including a plurality of pixels, the method comprising: for each of the plurality of pixels of the image, generating a convolutional kernel having a plurality of kernel values for the pixel; generating a plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, each of the plurality of offsets to indicate a deviation from a pixel position of the pixel; determining a plurality of deviated pixel positions based on the pixel position of the pixel and the plurality of offsets; and filtering the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: January 9, 2024
    Assignee: INTEL CORPORATION
    Inventors: Anbang Yao, Ming Lu, Yikai Wang, Xiaoming Chen, Junjie Huang, Tao Lv, Yuanke Luo, Yi Yang, Feng Chen, Zhiming Wang, Zhiqiao Zheng, Shandong Wang
  • Patent number: 11868782
    Abstract: Methods and systems are disclosed using an execution pipeline on a multi-processor platform for deep learning network execution. In one example, a network workload analyzer receives a workload, analyzes a computation distribution of the workload, and groups the network nodes into groups. A network executor assigns each group to a processing core of the multi-core platform so that the respective processing core handle computation tasks of the received workload for the respective group.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: January 9, 2024
    Assignee: Intel Corporation
    Inventors: Liu Yang, Anbang Yao
  • Publication number: 20240005628
    Abstract: Techniques related to bidirectional compact deep fusion networks for multimodal image inputs are discussed. Such techniques include applying a shared convolutional layer and independent batch normalization layers to input volumes for each modality and fusing features from the resultant output volumes in both directions across the modalities.
    Type: Application
    Filed: November 19, 2020
    Publication date: January 4, 2024
    Applicant: Intel Corporation
    Inventors: Dongqi CAI, Anbang YAO, Yikai WANG, Ming LU, Yurong CHEN
  • Publication number: 20240005649
    Abstract: Techniques related to poly-scale kernel-wise convolutional neural network layers are discussed. A poly-scale kernel-wise convolutional neural network layer is applied to an input volume to generate an output volume and include filters each having a number of filter kernels with the same sample rate and differing dilation rates optionally in a repeating pattern of dilation rate groups within each of filters with the pattern of dilation rate groups offset between the filters the poly-scale kernel-wise convolutional neural network layer.
    Type: Application
    Filed: September 7, 2020
    Publication date: January 4, 2024
    Applicant: Intel Corporation
    Inventors: Anbang Yao, Xiao Zhou, Guangli Zhang, Yu Zhang, Dian Gu
  • Publication number: 20240005136
    Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: July 12, 2023
    Publication date: January 4, 2024
    Applicant: Intel Corporation
    Inventors: Kamal Sinha, Balaji Vembu, Eriko Nurvitadhi, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Joydeep Ray, Ping T. Tang, Michael S. Strickland, Xiaoming Chen, Anbang Yao, Tatiana Shpeisman, Abhishek R. Appu, Altug Koker, Farshad Akhbari, Narayan Srinivasa, Feng Chen, Dukhwan Kim, Nadathur Rajagopalan Satish, John C. Weast, Mike B. MacPherson, Linda L. Hurd, Vasanth Ranganathan, Sanjeev Jahagirdar
  • Publication number: 20230410496
    Abstract: Omni-scale convolution for convolutional neural networks is disclosed. An example of an apparatus includes one or more processors to process data, including processing for a convolutional neural network (CNN); and a memory to store data, including CNN data, wherein processing of input data by the CNN includes implementing omni-scale convolution in one or more convolutional layers of the CNN, implementation of the omni-scale convolution into a convolutional layer of the one or more convolutional layers including at least applying multiple dilation rates in a plurality of kernels of a kernel lattice of the convolutional layer, and applying a cyclic pattern for the multiple dilation rates in the plurality of kernels of the convolutional layer.
    Type: Application
    Filed: December 23, 2020
    Publication date: December 21, 2023
    Applicant: Intel Corporation
    Inventors: Anbang YAO, Bo LIU, Ming LU, Feng CHEN, Yurong CHEN
  • Publication number: 20230401668
    Abstract: One embodiment provides a general-purpose graphics processing unit comprising a dynamic precision floating-point unit including a control unit having precision tracking hardware logic to track an available number of bits of precision for computed data relative to a target precision, wherein the dynamic precision floating-point unit includes computational logic to output data at multiple precisions.
    Type: Application
    Filed: August 25, 2023
    Publication date: December 14, 2023
    Applicant: Intel Corporation
    Inventors: Elmoustapha Ould-Ahmed-Vall, Sara S. Baghsorkhi, Anbang Yao, Kevin Nealis, Xiaoming Chen, Altug Koker, Abhishek R. Appu, John C. Weast, Mike B. Macpherson, Dukhwan Kim, Linda L. Hurd, Ben J. Ashbaugh, Barath Lakshmanan, Liwei Ma, Joydeep Ray, Ping T. Tang, Michael S. Strickland
  • Publication number: 20230394616
    Abstract: One embodiment provides a parallel processor comprising a hardware scheduler to schedule pipeline commands for compute operations to one or more of multiple types of compute units, a plurality of processing resources including a first sparse compute unit configured for input at a first level of sparsity and hybrid memory circuitry including a memory controller, a memory interface, and a second sparse compute unit configured for input at a second level of sparsity that is greater than the first level of sparsity.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 7, 2023
    Applicant: Intel Corporation
    Inventors: Eriko Nurvitadhi, Balaji Vembu, Nicolas C. Galoppo Von Borries, Rajkishore Barik, Tsung-Han Lin, Kamal Sinha, Nadathur Rajagopalan Satish, Jeremy Bottleson, Farshad Akhbari, Altug Koker, Narayan Srinivasa, Dukhwan Kim, Sara S. Baghsorkhi, Justin E. Gottschlich, Feng Chen, Elmoustapha Ould-Ahmed-Vall, Kevin Nealis, Xiaoming Chen, Anbang Yao
  • Publication number: 20230386072
    Abstract: Techniques related to 3D pose estimation from a 2D input image are discussed. Such techniques include incrementally adjusting an initial 3D pose generated by applying a lifting network to a detected 2D pose in the 2D input image by projecting each current 3D pose estimate to a 2D pose projection, applying a residual regressor to features based on the 2D pose projection and the detected 2D pose, and combining a 3D pose increment from the residual regressor to the current 3D pose estimate.
    Type: Application
    Filed: December 1, 2020
    Publication date: November 30, 2023
    Applicant: Intel Corporation
    Inventors: Anbang YAO, Yangyuxuan KANG, Shandong WANG, Ming LU, Yurong CHEN, Wenjian SHAO, Yikai WANG, Haojun XU, Chao YU, Chong WONG
  • Publication number: 20230368493
    Abstract: A method and system of image hashing object detection for image processing are provided.
    Type: Application
    Filed: November 13, 2020
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Yuqing HOU, Xiaolong LIU, Anbang YAO, Yurong CHEN