Patents by Inventor Andrew Marshall
Andrew Marshall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260195735Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel. Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: ApplicationFiled: December 11, 2025Publication date: July 9, 2026Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 12530675Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel. Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: GrantFiled: April 9, 2024Date of Patent: January 20, 2026Assignee: PAYPAL, INC.Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Publication number: 20250326697Abstract: Systems and methods are provided for reaction bonded SiC-diamond (RBSiC-Diamond) composite with machinable features. A reaction bonded silicon carbide (SiC) based article may have a main structure formed using a first composite, and machinable areas formed using a second composite added to the main structures, to form a single continuous structure. The first composite may be silicon carbide (SiC) composite combined with at least one other element or compound (e.g., diamond), where the at least one other element or compound is selected to ensure meeting one or more performance criteria. Adding the other element or compound makes the main structure hard to machine or tool. The second composite may include silicon carbide (SiC) composite. The machinable areas may require machining or tooling, and the second composite may be easier to machine or tool than the first composite. The first composite is reaction bond to the second composite through infiltration bonding.Type: ApplicationFiled: April 18, 2024Publication date: October 23, 2025Inventors: Andrew Marshall, Kevin Denneny
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Publication number: 20250289762Abstract: A method of producing reaction bonded ceramic components containing internal features is described. In some embodiments, methods as described herein may utilize a preform containing a silicon consumable core that is melted during processing.Type: ApplicationFiled: March 13, 2024Publication date: September 18, 2025Inventors: Andrew Marshall, Jonathan Coppola, Michael Aghajanian, Charles Addison Heulitt, IV
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Publication number: 20250074832Abstract: A method of producing reaction bonded silicon carbide (RB-SiC) ceramic components containing internal channels is described. In some embodiments, methods as described herein may utilize diamond powder at the interface of two or more preformed sections.Type: ApplicationFiled: August 29, 2023Publication date: March 6, 2025Inventors: Andrew Marshall, Sean McAnany, Samuel Salamone, Jiwen Wang, Michael Aghajanian
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Publication number: 20250049904Abstract: The present application is directed to immunomodulatory compositions comprising invariant NKT cell (iNKT cell) agonist compounds that induce expansion of tissue resident memory T-cells (Trm Cells) in combination with an immune stimulator agent that enhances an immune response to a target antigen or a polynucleotide encoding the immune stimulator. The iNKT agonists are ?-GalCer analogue compounds modified at the 6 position of the galactose ring. The immune stimulator is an antigen or an mRNA encoding an antigen to create a vaccine formulation. These combinations are used in the treatment of infection or cancer in a subject, or to enrich the number of Trm cells in the liver of a subject.Type: ApplicationFiled: December 22, 2022Publication date: February 13, 2025Inventors: Gavin Frank Painter, Ian Francis Hermans, Mitch Ganley, William Heath, Lauren Holz, Regan James Anderson, Benjamin Jason Compton, Andrew Marshall
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Patent number: 12221971Abstract: A compressor has: a rotor and a shroud having a internal and external sides and an air outlet; an annular case mounted to the external side and enclosing a plenum, the annular case having inner and outer sides and defining an aperture; a valve mounted to the annular case at the aperture and having: a support secured to the annular case and defining a seat surrounding a bleed passage, the seat located on the outer side, the support defining a guiding aperture, and a valve member having a head and a stem slidably received within the guiding aperture, the valve member having a closed position and an open position, the head abutting the valve seat in the closed position and offset from the valve seat in the open position; and an actuator engaged to the valve member for moving the valve member between the closed position and the open position.Type: GrantFiled: November 30, 2023Date of Patent: February 11, 2025Assignee: PRATT & WHITNEY CANADA CORP.Inventors: David Menheere, Andrew Marshall
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Publication number: 20240354743Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel. Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: ApplicationFiled: April 9, 2024Publication date: October 24, 2024Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 12063788Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.Type: GrantFiled: January 25, 2022Date of Patent: August 13, 2024Assignees: NUTECH VENTURES, GEORGIA TECH RESEARCH CORPORATION, THE TRUSTEES OF INDIANA UNIVERSITY, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Peter A. Dowben, Ruihua Cheng, Xiaoshan Xu, Alpha T. N'Diaye, Aaron Mosey, Guanhua Hao, Thilini K. Ekanayaka, Xuanyuan Jiang, Andrew J. Yost, Andrew Marshall, Azad J. Naeemi
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Publication number: 20240247366Abstract: Disclosed herein are bonded diamond composites that may include a ceramic composite layer, a diamond film layer, and a silicon carbide bonding layer bonding the diamond film layer to the ceramic composite layer. Example ceramic composite layers disclosed herein include diamond particles within a silicon carbide matrix. Methods of making bonded diamond composites through infiltration bonding are disclosed herein. Example methods include exposing a ceramic preform to molten silicon such that the silicon infiltrates into and through the silicon preform to a diamond film interfaced with the ceramic preform. Example methods include reacting the silicon with the ceramic preform and the diamond film to form a silicon carbide bonding layer bonding the diamond film to the resulting ceramic composite layer.Type: ApplicationFiled: January 23, 2023Publication date: July 25, 2024Inventors: Andrew Marshall, Glenn EVANS, Samuel SALAMONE, Michael AGHAJANIAN
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Patent number: 11978038Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: GrantFiled: May 6, 2022Date of Patent: May 7, 2024Assignee: PAYPAL, INC.Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Publication number: 20230360024Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: ApplicationFiled: May 6, 2022Publication date: November 9, 2023Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 11764786Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: GrantFiled: May 29, 2022Date of Patent: September 19, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11757449Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: GrantFiled: May 29, 2022Date of Patent: September 12, 2023Assignees: BOARD OF REGENT'S OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11658663Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: GrantFiled: May 29, 2022Date of Patent: May 23, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATION, Board OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Publication number: 20220294449Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294450Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294448Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220238537Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.Type: ApplicationFiled: January 25, 2022Publication date: July 28, 2022Inventors: Peter A. Dowben, Ruihua Cheng, Xiaoshan Xu, Alpha T. N'Diaye, Aaron Mosey, Guanhua Hao, Thilini K. Ekanayaka, Xuanyuan Jiang, Andrew J. Yost, Andrew Marshall, Azad J. Naeemi
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Patent number: 11349480Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.Type: GrantFiled: September 24, 2019Date of Patent: May 31, 2022Assignees: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov