Abstract: A sigma-delta-type converter comprises: a sigma-delta modulator having a digital output having a first prefixed bit number; a randomizer including a circular memory; an analogical reconstruction filter comprising a branch number equal to said first default number including sampling capacitors and a low-pass filter; characterized in that said circular memory comprises a number of elements equal to said first default number of bits less one and receives in input said first default number of bits less one, and in that a bit of said first default number of bits is applied to one of said branches of said reconstruction filter.

Abstract: The amplifier circuit includes at least one amplification branch having an input transistor, an output transistor, having a source terminal connected to the input terminal and a drain terminal connected to a first output terminal, and a gain raising stage, having an input and an output connected to the source terminal and, respectively, to a gate terminal of the output transistor. The amplifier circuit includes, moreover, a compensation capacitor connected between the gate terminal and the drain terminal of the output transistor.

Abstract: A sigma-delta-type converter comprises: a sigma-delta modulator having a digital output having a first prefixed bit number; a randomizer including a circular memory; an analogical reconstruction filter comprising a branch number equal to said first default number including sampling capacitors and a low-pass filter; characterized in that said circular memory comprises a number of elements equal to said first default number of bits less one and receives in input said first default number of bits less one, and in that a bit of said first default number of bits is applied to one of said branches of said reconstruction filter.

Abstract: A method of improving the signal/noise ratio of a sigma-delta modulator during the re-establishment of its stability that includes: defining a bit sequence corresponding to a state of instability of the modulator, monitoring the flow of bits output by the modulator to check whether it contains the instability bit sequence, and resetting the modulator to zero if the instability bit sequence is detected at the output. To ensure a high signal/noise ratio of the modulator even during the detection and re-establishment of stability, the method also includes: delaying the flow of bits output by the modulator at least for the time required to detect the instability bit sequence and modifying the output bit sequence during the delay period by replacing it with a predetermined bit sequence.

Abstract: A method of self-calibrating a modulator includes at least one integrator likely to incur a phase error may include reading a pulse response of the modulator, calculating a phase error parameter of the at least one integrator, and calibrating the phase error parameter. In addition, the calibration may provide a count of pulse response samples above suitable threshold values, as well as a change in the value of a capacitor associated with the integrator based upon the sample count.

Abstract: A method for calibrating a frequency of a sigma-delta modulator having a go path that includes, in series, a resonator circuit and of an analog to digital conversion block, and a feedback path including a digital to analog conversion block, including the steps: a) applying an input pulse to the resonator circuit; b) measuring the oscillating frequency of the output signal from the resonator circuit in response to the pulse, while the feedback path of the sigma-delta modulator is opened; c) comparing the oscillating frequency of the resonator circuit with a selected frequency; d) modifying the oscillating frequency proportionately as a function of the comparison step. The resonator circuit includes an integrator filter with a variable gain amplifier in its feedback path, the variable gain configured to be modified as a function of the comparison, performed while the modulator feedback path is opened.

Abstract: A method for detecting displacements of a micro-electromechanical sensor including a fixed body and a mobile mass, and forming a first sensing capacitor and a second sensing capacitor having a common capacitance at rest. The first and second sensing capacitors being connected to a first input terminal and, respectively, to a first output terminal and to a second output terminal of the sensing circuit. The method includes the steps of closing a first negative-feedback loop, which is formed by the first and second sensing capacitors and by a differential amplifier, feeding an input of the differential amplifier with a staircase sensing voltage through driving capacitors so as to produce variations of an electrical driving quantity which are inversely proportional to the common sensing capacitance, and driving the sensor with the electrical driving quantity.

Abstract: The amplifier circuit includes at least one amplification branch having an input transistor, an output transistor, having a source terminal connected to the input terminal and a drain terminal connected to a first output terminal, and a gain raising stage, having an input and an output connected to the source terminal and, respectively, to a gate terminal of the output transistor. The amplifier circuit includes, moreover, a compensation capacitor connected between the gate terminal and the drain terminal of the output transistor.

Abstract: The present invention refers to a fully differential operational amplifier of the folded cascode type. In one embodiment the fully differential operational amplifier comprises: a differential input stage able to drive a differential output stage; said differential output stage includes a first branch having at least a first and a second transistor, and a second branch having at least a third and a fourth transistor; said first and second branch are coupled to a first and a second voltage source; a feedback circuit of said first, second, third and fourth transistors that is constituted by a single amplifier having four inputs and four outputs, said four inputs taking the voltages present on a terminal of said first, second, third and fourth transistors, and providing voltages to the control elements of said first, second, third and fourth transistors, which voltages depend on the input voltages of said four inputs.

Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.

Abstract: Method for detecting movements through a micro-electric-mechanical sensor, having a fixed body and a moving mass, forming at least one first and one second detection capacitor, connected to a common node and to a first, respectively a second detection node and having a common detection capacitance at rest and a capacitive unbalance in case of a movement. The method includes the steps of: feeding the common node with a constant detection voltage of predetermined duration; generating a feedback voltage to maintain the first and the second detection node at a constant common mode voltage; generating a compensation electric quantity, inversely proportional to the common detection capacitance at least in one predetermined range; supplying the compensating electric quantity to the common node; and detecting an output quantity related to the capacitive unbalance.

Abstract: A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.

Abstract: A digital-analog converter having a sigma delta cascade modulator with two outputs, particularly a third order sigma delta modulator 2+1. The digital-analog converter includes a sigma delta modulator of the type having two outputs able to supply a first and a second signal to the two outputs; a reconstruction circuit of the first and second signals able to provide a reconstructed signal; a filter able to filter the reconstructed signal; the reconstruction circuit combining the first and second signals according to the following relationship: Yout Y1*(1+Z−1)−Y2*(1−Z−1)+Y2*Z−2*(1−Z−1), where: Yout corresponds to said reconstructed signal, Y1 corresponds to said first signal, Y2 corresponds to said according to signal, Z corresponds to the Z transform.

Abstract: A method for digital-to-analog conversion of a digital input code into a first output analog signal and a second output analog signal to be supplied to a first terminal and a second terminal, respectively, of an audio load, the conversion being performed by means of a DAC with N-level balanced output, the conversion method includes using N/2 positive generator elements supplying respective positive elementary contributions which are nominally equal to one another, and N/2 negative generator elements supplying respective negative elementary contributions which are nominally equal to one another and, in absolute value, equal to the positive elementary contributions; attributing the same progressive addresses to the positive generator elements and to the negative generator elements; defining a first index for the positive input codes and a second index for the negative input codes; and, in the presence of an input code at the input of the DAC, selecting between the first index and the second index, the index cor

Abstract: Fully-differential, switched-capacitor circuit having a first and second input terminal, and including: an operational amplifier having a first and a second differential input, a first and a second output terminal and a bias control terminal; a feedback network, connected between the differential outputs and the input terminals, and having intermediate nodes connected to the differential inputs of the operational amplifier; and a control circuit, including a detection network and an error amplifier. The error amplifier has a first input receiving a desired common-mode voltage, and an output connected to the bias control terminal and supplying a control voltage. The detection network has a first and a second input connected directly, respectively, to the second input terminal of the operational amplifier, and an output connected to a second input of the error amplifier, and supplying a common-mode drive voltage.

Abstract: A method of improving the signal/noise ratio of a sigma-delta modulator during the re-establishment of its stability that includes: defining a bit sequence corresponding to a state of instability of the modulator, monitoring the flow of bits output by the modulator to check whether it contains the instability bit sequence, and resetting the modulator to zero if the instability bit sequence is detected at the output. To ensure a high signal/noise ratio of the modulator even during the detection and re-establishment of stability, the method also includes: delaying the flow of bits output by the modulator at least for the time required to detect the instability bit sequence and modifying the output bit sequence during the delay period by replacing it with a predetermined bit sequence.

Abstract: A switched operational amplifier with fully differential topology, alternately switchable on and off, and a control circuit. The operational amplifier has a first differential output (4a) and a second differential output, and a control terminal. The control circuit includes a capacitive detecting network including a first capacitor and a second capacitor connected between the first and second differential outputs and a common-mode node, and a third capacitor connected between the common-mode node and ground in a first operative condition, and between the common-mode node and the supply voltage in a second operative condition. A control transistor is connected between the common-mode node and the control terminal of the operational amplifier and supplies a control current correlated to the voltage on the common-mode node. A switchable voltage source, connected to the common-mode node, supplies a desired voltage in a first operative condition, when the operational amplifier is off.

Abstract: A method for digital-to-analog conversion of a digital input code into a first output analog signal and a second output analog signal to be supplied to a first terminal and a second terminal, respectively, of an audio load, the conversion being performed by means of a DAC with N-level balanced output, the conversion method includes using N/2 positive generator elements supplying respective positive elementary contributions which are nominally equal to one another, and N/2 negative generator elements supplying respective negative elementary contributions which are nominally equal to one another and, in absolute value, equal to the positive elementary contributions; attributing the same progressive addresses to the positive generator elements and to the negative generator elements; defining a first index for the positive input codes and a second index for the negative input codes; and, in the presence of an input code at the input of the DAC, selecting between the first index and the second index, the index cor

Abstract: The present invention refers to a current generator able to provide in alternative to a first terminal a first current and a second current in response to a control signal. Particularly it refers to a current generator usable for the adaptive biasing of modulators of the sigma-delta type. In an embodiment the current generator is able to provide in alternative to a first terminal (70) a first current and a second current in response to a control signal (CK), characterized by comprising: a first current generator (40) able to provide said first current; a second current generator (41) able to provide said second current; commutation means (46) able to connect in alternative to said first terminal (70) said first current and said second current in response to said control signal (CK).

Abstract: A switched input circuit structure of the type which includes an input terminal receiving an input voltage and an output terminal connected to an input capacitor. An operational amplifier is included having a non-inverting terminal connected to a ground reference terminal, an inverting input terminal, and an output terminal feedback connected to the inverting input terminal and held in a virtual ground condition by a parallel of first and second charge paths which are connected between the input terminal of the switched input circuit structure and the inverting input terminal of the operational amplifier and connected to the supply voltage reference and the ground reference, respectively.