Patents by Inventor Andrea Baschirotto

Andrea Baschirotto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020041244
    Abstract: A digital-analog converter having a sigma delta cascade modulator with two outputs, particularly a third order sigma delta modulator 2+1.
    Type: Application
    Filed: July 11, 2001
    Publication date: April 11, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Gabriele Gandolfi, Andrea Baschirotto, Vittorio Colonna, Paolo Cusinato
  • Publication number: 20020030618
    Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.
    Type: Application
    Filed: July 30, 2001
    Publication date: March 14, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Paolo Cusinato, Andrea Baschirotto, Fabio Pasolini
  • Publication number: 20020011900
    Abstract: A switched operational amplifier with fully differential topology, alternately switchable on and off, and a control circuit. The operational amplifier has a first differential output (4a) and a second differential output, and a control terminal. The control circuit includes a capacitive detecting network including a first capacitor and a second capacitor connected between the first and second differential outputs and a common-mode node, and a third capacitor connected between the common-mode node and ground in a first operative condition, and between the common-mode node and the supply voltage in a second operative condition. A control transistor is connected between the common-mode node and the control terminal of the operational amplifier and supplies a control current correlated to the voltage on the common-mode node. A switchable voltage source, connected to the common-mode node, supplies a desired voltage in a first operative condition, when the operational amplifier is off.
    Type: Application
    Filed: May 23, 2001
    Publication date: January 31, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Andrea Baschirotto, Paolo Cusinato, Giampiero Montagna, Rinaldo Castello
  • Publication number: 20020005757
    Abstract: The present invention refers to a fully differential operational amplifier of the folded cascode type.
    Type: Application
    Filed: June 21, 2001
    Publication date: January 17, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Vittorio Colonna, Andrea Baschirotto, Paolo Cusinato, Gabriele Gandolfi
  • Publication number: 20010045817
    Abstract: The present invention refers to a current generator able to provide in alternative to a first terminal a first current and a second current in response to a control signal. Particularly it refers to a current generator usable for the adaptive biasing of modulators of the sigma-delta type.
    Type: Application
    Filed: May 11, 2001
    Publication date: November 29, 2001
    Inventors: Paolo Cusinato, Andrea Baschirotto, Vittorio Colonna, Gabriele Gandolfi
  • Publication number: 20010020869
    Abstract: The present invention regards a class AB single-stage operational amplifier comprising an input decoupler stage for voltage signals, a voltage repeater stage, biasing means and means for the generation of bias current of said input decoupler stage, and is characterized in that said single-stage class AB operational amplifier has capacitive means placed between said voltage decoupler stage and said voltage repeater stage so as to increase the phase margin.
    Type: Application
    Filed: March 8, 2001
    Publication date: September 13, 2001
    Inventors: Paolo Cusinato, Andrea Baschirotto, Vittorio Colonna, Gabriele Gandolfi
  • Patent number: 6163176
    Abstract: An AC-coupled driver comprises a drain output stage in which the quiescent-state current is set by a current mirror, and by a bias current for the current mirror. The drain output stage includes a DC coupling connected to the current mirror by a capacitive-resistive network. The DC coupling allows the drain output stage to deliver a high current following input of an AC voltage signal into the AC-coupled driver.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: December 19, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Baschirotto, Giovanni Frattini
  • Patent number: 6031416
    Abstract: A CMOS elementary cell of the first order for time-continuous analog filters with non-linearity compensation, is connected between a first supply voltage reference and a second voltage reference. The cell is of a type which comprises at least a first MOS transistor having its conduction terminals connected to the first supply voltage reference and to an output terminal, and having a control terminal connected to an input terminal of the first order CMOS elementary cell. The cell further comprises a second MOS transistor in diode configuration, and an equivalent capacitor, both connected to the output terminal of the first order CMOS elementary cell. The second, diode-connected MOS transistor and the equivalent capacitor act as a load for the first MOS transistor. The first MOS transistor operates as a drive transistor operatively tied to an input voltage signal being supplied to the input terminal of the first order CMOS elementary cell. A second order filter CMOS elementary cell is similarly connected.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: February 29, 2000
    Assignee: STMicroeletronics S.r.l.
    Inventors: Andrea Baschirotto, Ugo Baschirotto, Guido Brasca, Rinaldo Castello
  • Patent number: 5994960
    Abstract: In a switched operational amplifier including a differential input stage and at least a second output stage, the compensation capacitor commonly required to couple the output node of the second stage with the respective output node of the input differential stage of the amplifier is associated with a switching circuit. The switching circuit is controlled by the same control phase that enables/disables the amplifier for interrupting the connection between the compensation capacitor (CC) and the output node of the differential input stage during a phase in which the amplifier is disabled for reducing the switch-on time. Notably the differential input stage of the operational amplifier remains always active and only the second output stage is switched on and off.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: November 30, 1999
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Andrea Baschirotto, Angelo Nagari, Rinaldo Castello
  • Patent number: 5973537
    Abstract: In switch-capacitor systems for extremely low supply voltage, employing a fully differential switched op-amp, proper functioning of nMOS switches coupled to the inverting input node of an integrated stage capable of outputting a common mode control signal is made possible by retaining the ground potential on the input node to prevent body effects on the threshold of nMOS switches by means of an auxiliary switched capacitor.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: October 26, 1999
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Andrea Baschirotto, Angelo Nagari, Rinaldo Castello
  • Patent number: 5745002
    Abstract: A switched capacitance circuit, using a switched operational amplifier structure as an input switch of the switched capacitance, is provided with a new biasing circuit. An additional switched capacitor, switched alternately to power supply and to ground, is connected to the output side of the primary switched capacitor. Precision is retained while ensuring a rail-to-rail dynamic range, without requiring boosted control phases. Special arrangements may be implemented for controlling the amplitude of switching spikes when so required. A fully differential embodiment is also feasible with additional advantages.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: April 28, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Andrea Baschirotto, Rinaldo Castello, Federico Montecchi, Angelo Nagari
  • Patent number: 5696457
    Abstract: A low-voltage transconductor circuit in which the common mode gain of a first transconductor stage is compensated by a second transconductor stage (connected in parallel with the first transconductor stage) which has no differential mode transconductance, and which is connected so that its common mode transconductance offsets the common mode transconductance of the stage. This greatly reduces the common mode current signal at the output, while avoiding the necessity for a current sink at the source of the input transistors.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: December 9, 1997
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Francesco Rezzi, Andrea Baschirotto, Rinaldo Castello
  • Patent number: 5576646
    Abstract: The invention relates to a transconductor circuit with a double input and a single output, comprising two input transistors (M1, M2) whose primary conduction terminals (D1, S1, D2, S2) are respectively connected together; in this way, variations in load current and voltage can be made lower, thereby also lowering distortion from changes in their transconductance.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 19, 1996
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Francesco Rezzi, Andrea Baschirotto, Rinaldo Castello
  • Patent number: 5495166
    Abstract: A threshold voltage generator for a field-effect transistor, being of a type adapted to compensate for variations of the threshold voltage from a nominal value, comprising a first amplifier having a first input connected to a current generator; a second amplifier connected ahead of a second input of the first amplifier and having an input connected to another current generator; and a third amplifier connected after the first amplifier and having an output adapted to produce the value of said threshold voltage.
    Type: Grant
    Filed: April 8, 1993
    Date of Patent: February 27, 1996
    Assignee: SGS-Thomson Microelectronics s.r.l.
    Inventors: Roberto Alini, Andrea Baschirotto, Rinaldo Castello, Salvatore Portaluri
  • Patent number: 5332937
    Abstract: A transconductor differential stage for high-frequency filters, which has a MOS differential input pair with common sources. The drain of each MOS input is connected to the emitter of an npn bipolar. These two matched bipolars have their gates connected together with the gate of a third bipolar, which is diode-connected. Two matched current sources feed the two bipolars, and a third current source feeds the third bipolar. A single controlled current sink is connected to the sources of both MOS input transistors, and also (through a resistor) to the third bipolar.
    Type: Grant
    Filed: September 9, 1992
    Date of Patent: July 26, 1994
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Rinaldo Castello, Roberto Alini, Andrea Baschirotto, Gianfranco Vai