Patents by Inventor Andrea Locatelli
Andrea Locatelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10964372Abstract: Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be biased to a voltage (e.g., a non-zero voltage) after the pre-charge phase. In some examples, the memory cell may be biased to the voltage when a word line is unbiased and the memory cell is isolated from the digit line.Type: GrantFiled: June 14, 2019Date of Patent: March 30, 2021Assignee: Micron Technology, Inc.Inventors: Angelo Visconti, Giorgio Servalli, Andrea Locatelli
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Patent number: 10896712Abstract: Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.Type: GrantFiled: June 14, 2019Date of Patent: January 19, 2021Assignee: Micron Technology, Inc.Inventors: Angelo Visconti, Andrea Locatelli, Giorgio Servalli
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Publication number: 20200395057Abstract: Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventors: Angelo Visconti, Andrea Locatelli, Giorgio Servalli
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Publication number: 20200395056Abstract: Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be biased to a voltage (e.g., a non-zero voltage) after the pre-charge phase. In some examples, the memory cell may be biased to the voltage when a word line is unbiased and the memory cell is isolated from the digit line.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventors: Angelo Visconti, Giorgio Servalli, Andrea Locatelli
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Patent number: 10410737Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: GrantFiled: April 23, 2019Date of Patent: September 10, 2019Assignee: Micron Technology, Inc.Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Publication number: 20190252034Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: ApplicationFiled: April 23, 2019Publication date: August 15, 2019Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Patent number: 10304558Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: GrantFiled: November 5, 2018Date of Patent: May 28, 2019Assignee: Micron Technology, Inc.Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Publication number: 20190080782Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: ApplicationFiled: November 5, 2018Publication date: March 14, 2019Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Patent number: 10153054Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: GrantFiled: December 11, 2017Date of Patent: December 11, 2018Assignee: MICRON TECHNOLOGY, INC.Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Publication number: 20180166151Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: ApplicationFiled: December 11, 2017Publication date: June 14, 2018Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Publication number: 20170358370Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: ApplicationFiled: June 1, 2017Publication date: December 14, 2017Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Patent number: 9842661Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: GrantFiled: June 1, 2017Date of Patent: December 12, 2017Assignee: MICRON TECHNOLOGY, INC.Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Patent number: 9697913Abstract: Methods, systems, and devices for recovering fatigued ferroelectric memory cells are described. Recovery voltages may be applied to a ferroelectric memory cell that is fatigued due to repeated access (read or write) operations. The recovery voltage may have a greater amplitude than the access voltage and may include multiple voltage pulses or a constant voltage. The recovery operation may be performed in the background as the memory array operates, or it may be performed when a host device is not actively using the memory array. The recovery operations may be performed periodically or may include discrete series of pulses distributed among several instances.Type: GrantFiled: June 10, 2016Date of Patent: July 4, 2017Assignee: MICRON TECHNOLOGY, INC.Inventors: Marcello Mariani, Giorgio Servalli, Andrea Locatelli
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Patent number: D824143Type: GrantFiled: December 21, 2016Date of Patent: July 31, 2018Assignee: SUPERFLEX, INC.Inventors: Katherine Goss Witherspoon, Megan Grant, Nicole Ida Kernbaum, Richard Mahoney, Violet Riggs, Mallory L. Tayson-Frederick, Mary Elizabeth Hogue, Angelita Tadeo, Andrea Locatelli, Yves Behar
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Patent number: D834573Type: GrantFiled: September 21, 2017Date of Patent: November 27, 2018Assignee: Facebook, Inc.Inventors: Oliver Pell, Peter John Richard Gilbert Bracewell, Chuankeat Kho, Andrea Locatelli