Patents by Inventor Andreas A. Fenner

Andreas A. Fenner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus for wafer-level burn-in and testing of integrated circuits
    Patent number: 6548826
    Abstract: In one embodiment, a testing regimen is implemented to reduce test time. Specifically, a structure and method to power up and stabilize all die on the wafer prior to testing each die is implemented. More specifically, parallel powering schemes including die stabilization procedures are used to ready the wafer for testing. A wafer probe tester is indexed from one die to the next for an uninterrupted testing of all die in the wafer subsequent to all die power up and stabilization.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: April 15, 2003
    Inventors: Andreas A. Fenner, David L. Thompson
  • Method and apparatus for wafer-level burn-in and testing of integrated circuits
    Publication number: 20030010977
    Abstract: In one embodiment, a testing regimen is implemented to reduce test time. Specifically, a structure and method to power up and stabilize all die on the wafer prior to testing each die is implemented. More specifically, parallel powering schemes including die stabilization procedures are used to ready the wafer for testing. A wafer probe tester is indexed from one die to the next for an uninterrupted testing of all die in the wafer subsequent to all die power up and stabilization.
    Type: Application
    Filed: September 16, 2002
    Publication date: January 16, 2003
    Applicant: Medtronic, Inc.
    Inventors: Andreas A. Fenner, David L. Thompson
  • Method and apparatus for wafer-level burn-in and testing of integrated circuits
    Publication number: 20010033183
    Abstract: In one embodiment, a testing regimen is implemented to reduce test time. Specifically, a structure and method to power up and stabilize all die on the wafer prior to testing each die is implemented. More specifically, parallel powering schemes including die stabilization procedures are used to ready the wafer for testing. A wafer probe tester is indexed from one die to the next for an uninterrupted testing of all die in the wafer subsequent to all die power up and stabilization.
    Type: Application
    Filed: March 22, 2001
    Publication date: October 25, 2001
    Applicant: Medtronic Inc.
    Inventors: Andreas A. Fenner, David L. Thompson
  • Feedthrough assembly for implantable medical devices and methods for providing same
    Patent number: 6052623
    Abstract: A feedthrough assembly for an implantable medical device includes one or more electrically conductive pins extending through apertures in a case of the medical device with the electrically conductive pins being insulated from the case. The feedthrough assembly further includes a printed circuit board having a diode protection circuit mounted thereon. The printed circuit board forms at least a part of electrically conductive paths for connection of the electrically conductive pins to a medical device circuit assembly mounted within the case. The printed circuit board further provides for electrical connection of the diode protection circuit mounted thereon between the electrically conductive pins and the case.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: April 18, 2000
    Assignee: Medtronic, Inc.
    Inventors: Andreas A. Fenner, Lary R. Larson, Daniel R. Greeninger, David L. Thompson