Abstract: Methods and apparatus for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells are provided. A photovoltaic (PV) device generally includes a window layer; an absorber layer disposed below the window layer such that electrons are generated when photons travel through the window layer and are absorbed by the absorber layer; and a plurality of contacts for external connection coupled to the absorber layer, such that all of the contacts for external connection are disposed below the absorber layer and do not block any of the photons from reaching the absorber layer through the window layer. Locating all the contacts on the back side of the PV device avoids solar shadows caused by front side contacts, typically found in conventional solar cells. Therefore, PV devices described herein with back side contacts may allow for increased efficiency when compared to conventional solar cells.

Abstract: Embodiments of the invention generally relate to apparatuses for chemical vapor deposition (CVD) processes. In one embodiment, a wafer carrier track for levitating and traversing a wafer carrier within a vapor deposition reactor system is provided which includes upper and lower sections of a track assembly having a gas cavity formed therebetween. A guide path extends along an upper surface of the upper section and between two side surfaces which extend along and above the guide path and parallel to each other. A plurality of gas holes along the guide path extends from the upper surface of the upper section, through the upper section, and into the gas cavity. In some examples, the upper and lower sections of the track assembly may independently contain quartz, and in some examples, may be fused together.

Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. In one embodiment of a photovoltaic (PV) device, the PV device generally includes an n-doped layer and a p+-doped layer adjacent to the n-doped layer to form a p-n layer such that electric energy is created when electromagnetic radiation is absorbed by the p-n layer. The n-doped layer and the p+-doped layer may compose an absorber layer having a thickness less than 500 nm. Such a thin absorber layer may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.

Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. A photovoltaic (PV) device may incorporate front side and/or back side light trapping techniques in an effort to absorb as many of the photons incident on the front side of the PV device as possible in the absorber layer. The light trapping techniques may include a front side antireflective coating, multiple window layers, roughening or texturing on the front and/or the back sides, a back side diffuser for scattering the light, and/or a back side reflector for redirecting the light into the interior of the PV device. With such light trapping techniques, more light may be absorbed by the absorber layer for a given amount of incident light, thereby increasing the efficiency of the PV device.

Abstract: Methods and apparatus are provided for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells. In one embodiment of a photovoltaic (PV) device, the PV device generally includes an n-doped layer and a p+-doped layer adjacent to the n-doped layer to form a p-n layer such that electric energy is created when electromagnetic radiation is absorbed by the p-n layer. The n-doped layer and the p+-doped layer may compose an absorber layer having a thickness less than 500 nm. Such a thin absorber layer may allow for greater efficiency and flexibility in PV devices when compared to conventional solar cells.

Abstract: A method and apparatus for rapid thermal annealing comprising a plurality of lamps affixed to a lid of the chamber that provide at least one wavelength of light, a laser source extending into the chamber, a substrate support positioned within a base of the chamber, an edge ring affixed to the substrate support, and a gas distribution assembly in communication with the lid and the base of the chamber. A method and apparatus for rapid thermal annealing comprising a plurality of lamps comprising regional control of the lamps and a cooling gas distribution system affixed to a lid of the chamber, a heated substrate support with magnetic levitation extending through a base of the chamber, an edge ring affixed to the substrate support, and a gas distribution assembly in communication with the lid and the base of the chamber.

Abstract: Embodiments of the invention generally relate to apparatuses and methods for chemical vapor deposition (CVD). In one embodiment, a heating lamp assembly for a CVD reactor system is provided which includes a lamp housing disposed on an upper surface of a support base and containing a plurality of lamps extending from a first lamp holder to a second lamp holder. The lamps may have split filament lamps and/or non-split filament lamps, and in some examples, split and non-split filament may be alternately disposed between the first and second lamp holders. A reflector may be disposed on the upper surface of the support base between the first and second lamp holders. In another embodiment, the method includes exposing a lower surface of a wafer carrier to energy emitted from the heating lamp assembly and heating the wafer carrier to a predetermined temperature.

Abstract: Embodiments of the invention generally relate to apparatuses for chemical vapor deposition (CVD) processes. In one embodiment, a wafer carrier track for levitating and traversing a wafer carrier within a vapor deposition reactor system is provided which includes upper and lower sections of a track assembly having a gas cavity formed therebetween. A guide path extends along an upper surface of the upper section and between two side surfaces which extend along and above the guide path and parallel to each other. A plurality of gas holes along the guide path extends from the upper surface of the upper section, through the upper section, and into the gas cavity. In some examples, the upper and lower sections of the track assembly may independently contain quartz, and in some examples, may be fused together.

Abstract: Embodiments of the invention generally relate to apparatuses for chemical vapor deposition (CVD) processes. In one embodiment, a reactor lid assembly for vapor deposition is provided which includes a first showerhead assembly and an isolator assembly disposed next to each other on a lid support, and a second showerhead assembly and an exhaust assembly disposed next to each other on the lid support, wherein the isolator assembly is disposed between the first and second showerhead assemblies and the second showerhead assembly is disposed between the isolator assembly and the exhaust assembly.

Abstract: Embodiments of the invention generally relate to apparatuses and methods for chemical vapor deposition (CVD) processes. In one embodiment, a CVD reactor has a reactor lid assembly disposed on a reactor body and containing a first showerhead assembly, an isolator assembly, a second showerhead assembly, and an exhaust assembly consecutively and linearly disposed next to each other on a lid support. The CVD reactor further contains first and second faceplates disposed on opposite ends of the reactor body, wherein the first showerhead assembly is disposed between the first faceplate and the isolator assembly and the exhaust assembly is disposed between the second showerhead assembly and the second faceplate. The reactor body has a wafer carrier disposed on a wafer carrier track and a lamp assembly disposed below the wafer carrier track and containing a plurality of lamps which may be utilized to heat wafers disposed on the wafer carrier.

Abstract: Methods and apparatus for measuring substrate uniformity is provided. The invention includes placing a substrate in a thermal processing chamber, rotating the substrate while the substrate is heated, measuring a temperature of the substrate at a plurality of radial locations as the substrate rotates, correlating each temperature measurement with a location on the substrate, and generating a temperature contour map for the substrate based on the correlated temperature measurements. Numerous other aspects are provided.

Abstract: A method of adjusting the heat transfer properties within a processing chamber is presented. Chamber properties may be determined and adjusted by adjusting the thermal mass of an edge ring disposed in the processing chamber.

Abstract: The amount of atoms diffused into a substrate may be made uniform or the thickness of a thin film may be made uniform in a low species utilization process by stopping the flow of gas into a reaction chamber during the low species utilization process. Stopping the flow of gas into a reaction chamber may entail closing the gate valve (the valve to the vacuum pump), stabilizing the pressure within the reaction chamber, and maintaining the stabilized pressure while stopping the gas flowing into the chamber. Low species utilization processes include the diffusion of nitrogen into silicon dioxide gate dielectric layers by decoupled plasma nitridation (DPN), the deposition of a silicon dioxide film by rapid thermal processing (RTP) or chemical vapor deposition (CVD), and the deposition of silicon epitaxial layers by CVD.

Abstract: A thermal processing system and method including scanning a line beam of intense radiation in a direction transverse to the line direction for thermally processing a wafer with a localized effectively pulsed beam of radiant energy. The thickness of the wafer is two-dimensionally mapped and the map is used to control the degree of thermal processing, for example, the intensity of radiation in the line beam to increase the uniformity. The processing may include selective etching of a pre-existing layer or depositing more material by chemical vapor deposition.

Abstract: Aspects of the invention include a method and apparatus for processing a substrate using a multi-chamber processing system (e.g., a cluster tool) adapted to process substrates in one or more batch and/or single substrate processing chambers to increase the system throughput. In one embodiment, a system is configured to perform a substrate processing sequence that contains batch processing chambers only, or batch and single substrate processing chambers, to optimize throughput and minimize processing defects due to exposure to a contaminating environment. In one embodiment, a batch processing chamber is used to increase the system throughput by performing a process recipe step that is disproportionately long compared to other process recipe steps in the substrate processing sequence that are performed on the cluster tool. In another embodiment, two or more batch chambers are used to process multiple substrates using one or more of the disproportionately long processing steps in a processing sequence.

Abstract: A method for fabricating a gate dielectric of a field effect transistor is provided. In one embodiment, the method includes removing a native oxide layer, forming an oxide layer, forming a gate dielectric layer over the oxide layer, forming an oxide layer over the gate dielectric layer, and annealing the layers and underlying thermal oxide/silicon interface. Optionally, the oxide layer may be nitridized prior to forming the gate dielectric layer. In one embodiment, the oxide layer on the substrate is formed by depositing the oxide layer, and the oxide layer on the gate dielectric layer is formed by oxidizing at least a portion of the gate dielectric layer using an oxygen-containing plasma. In another embodiment, the oxide layer on the gate dielectric layer is formed by forming a thermal oxide layer, i.e., depositing the oxide layer on the gate dielectric layer.

Abstract: A method for process monitoring includes receiving a sample having a first layer that is at least partially conductive and a second layer formed over the first layer, following production of contact openings in the second layer by an etch process, the contact openings including a plurality of test openings having different, respective transverse dimensions. A beam of charged particles is directed to irradiate the test openings. In response to the beam, at least one of a specimen current flowing through the first layer and a total yield of electrons emitted from a surface of the sample is measured, thus producing an etch indicator signal. The etch indicator signal is analyzed as a function of the transverse dimensions of the test openings so as to assess a characteristic of the etch process.

Abstract: A method of adjusting the heat transfer properties within a processing chamber is presented. Chamber properties may be determined and adjusted by adjusting the thermal mass of an edge ring disposed in the processing chamber.

Abstract: A method for process monitoring includes receiving a sample having a first layer that is at least partially conductive and a second layer formed over the first layer, following production of contact openings in the second layer by an etch process, the contact openings including a plurality of test openings having different, respective transverse dimensions. A beam of charged particles is directed to irradiate the test openings. In response to the beam, at least one of a specimen current flowing through the first layer and a total yield of electrons emitted from a surface of the sample is measured, thus producing an etch indicator signal. The etch indicator signal is analyzed as a function of the transverse dimensions of the test openings so as to assess a characteristic of the etch process.

Abstract: A method for process monitoring includes receiving a sample having a first layer that is at least partially conductive and a second layer formed over the first layer, following production of contact openings in the second layer by an etch process, the contact openings including a plurality of test openings having different, respective transverse dimensions. A beam of charged particles is directed to irradiate the test openings. In response to the beam, at least one of a specimen current flowing through the first layer and a total yield of electrons emitted from a surface of the sample is measured, thus producing an etch indicator signal. The etch indicator signal is analyzed as a function of the transverse dimensions of the test openings so as to assess a characteristic of the etch process.