Abstract: Apparatuses and methods relating to semiconductor layer structures are disclosed. A method for producing a semiconductor layer structure ay involve providing a Si substrate comprising a top surface, forming a first semiconductor layer on the substrate, the first semiconductor layer comprising a plurality of vertical nanowire structures, arranged perpendicularly to the top surface of the substrate, the first semiconductor layer comprising AlN, and epitaxially growing a second semiconductor layer which laterally and vertically encloses the plurality of vertical nanowire structures thereby encapsulating dislocations in shells around the nanowires, wherein the second semiconductor layer comprises AlxGa1-xN, wherein 0?x?0.95.

Abstract: A memory device (1) comprising a semiconductor pillar (40) and at least one memory cell (50) associated with the pillar (40), wherein each of the at least one memory cells (50) comprises a charge trap (60) and a transistor (2), wherein. for each of the at least one memory cells (50): the charge trap (60) of the memory cell (50) is configured to control a threshold voltage of the transistor (2) of the memory cell (50) by a stored charge; and the transistor (2) of the memory cell (50) comprises a source pillar segment (10), a drain pillar segment (14) and a body pillar segment (12), wherein at least one p-doped pillar segment (10, 12, 14) of the transistor (2) comprises a plurality of semiconductor layers (20), wherein layers of the plurality of semiconductor layers (20) are made of AIGaN or GaN, and wherein the plurality of semiconductor layers (20) is configured such that every second layer has a lower aluminum content than the neighboring mutually opposite layers thereof.

Abstract: A vertical high-electron-mobility transistor, HEMT (100), comprising: a substrate (310); a drain contact (410), the drain contact being a metal contact via through said substrate; a pillar layer (500) arranged above the drain contact (410) and comprising at least one vertical pillar (510) and a supporting material (520) laterally enclosing the at least one vertical pillar (510); a heterostructure mesa (600) arranged on the pillar layer (500), the heterostructure mesa (600) comprising an AlGaN-layer (610) and a GaN-layer (620), together forming a heterojunction (630); at least one source contact (420a, 420b) electrically connected to the heterostructure mesa (600); a gate contact (430) arranged on said heterostructure mesa (600), and above the at least one vertical pillar (510); wherein the at least one vertical pillar (510) is forming an electron transport channel between the drain contact (410) and the heterojunction (630).

Abstract: Apparatuses and methods relating to semiconductor layer structures are disclosed. A method for producing a semiconductor layer structure ay involve providing a Si substrate comprising a top surface, forming a first semiconductor layer on the substrate, the first semiconductor layer comprising a plurality of vertical nanowire structures, arranged perpendicularly to the top surface of the substrate, the first semiconductor layer comprising AlN, and epitaxially growing a second semiconductor layer which laterally and vertically encloses the plurality of vertical nanowire structures thereby encapsulating dislocations in shells around the nanowires, wherein the second semiconductor layer comprises AlxGa1-xN, wherein 0?x?0.95.

Abstract: There is provided a monolithic microwave integrated circuit, MMIC, front-end module which may include: a gallium nitride structure supported by a silicon substrate, a silicon-based transmit/receive switch having a transmit mode and a receive mode, a transmit amplifier configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, formed in said gallium nitride structure. The MMIC front-end module may further include a receive amplifier configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected to said transmit/receive switch, wherein said receive amplifier may include a gallium nitride HEMT formed in said gallium nitride structure.

Abstract: A transistor (1) comprising a source (10), a body (12) and a drain (14), the transistor (1) further comprising a plurality of semiconductor layers (20), wherein layers of the plurality of semiconductor layers (20) are made of AlGaN or GaN, and wherein the plurality of semiconductor layers (20) is configured such that an aluminum content changes between each consecutive layer such that every second layer has a lower aluminum content than the neighboring mutually opposite layers thereof, wherein the transistor (1) is either a N-channel metal-oxide-semiconductor, NMOS, transistor (1?), wherein part of the plurality of semiconductor layers (20) is p-doped and forms part of the body (12) of the NMOS transistor (1?); or a P-channel metal-oxide-semiconductor, PMOS, transistor (1?), wherein part of the plurality of semiconductor layers (20) is p-doped and forms part of the source (10) or the drain (14) of the PMOS transistor (1?).

Abstract: There is provided an AC-DC converter circuit (100) for high power charging of an electrical battery. The circuit comprises an input rectifier comprising a first node and a second node. The input rectifier (110) is configured to receive an AC voltage at the first node (112) and provide a rectified voltage at the second node (114). The circuit further comprises a first transistor (120), comprising a first gate node (122), a first source node (124), and a first drain node (126). The first drain node is connected to the second node of the input rectifier. The first gate node is connected to a ground node (170). The circuit further comprises a second transistor (130), comprising a second gate node (132), a second source node (134), and a second drain node (136). The second drain node is connected to the first source node. The second transistor materially corresponds to the first transistor.

Abstract: A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer.

Abstract: According to certain embodiments, a method (700) by a network node (660) includes determining (705) a timing error associated with a closed loop comprising at least one radio link between two radio points. The timing error is determined based on at least one timing measurement associated with the at least one radio link. The method further includes adjusting (710) timing information carried over the a timing protocol link based on the timing error associated with the closed loop comprising the at least one radio link.

Abstract: There is provided a monolithic microwave integrated circuit, MMIC, front-end module which may include: a gallium nitride structure supported by a silicon substrate, a silicon-based transmit/receive switch having a transmit mode and a receive mode, a transmit amplifier configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, formed in said gallium nitride structure. The MMIC front-end module may further include a receive amplifier configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected to said transmit/receive switch, wherein said receive amplifier may include a gallium nitride HEMT formed in said gallium nitride structure.

Abstract: There is provided a field-programmable gate array, FPGA, device (100) comprising a configurable logic block, CLB, (110) comprising a logic inverter (120) comprising a high-electron-mobility transistor, HEMT, (130), wherein the HEMT comprises: a Si substrate (384); an AlyGay-1N layer structure (380), wherein 0<y?1; a GaN layer structure (382); and a crystal transition layer structure (386) arranged on the Si substrate. The crystal transition layer comprises: a plurality of vertical nanowire structures (388) perpendicularly arranged on the Si substrate, and an AlxGax-1N layer structure (389), wherein 0?x<1, wherein the AlxGax-1N layer structure is arranged to vertically and laterally enclose the vertical nanowire structures. There is also provided an AI processing system comprising said FPGA device (100).

Abstract: The present invention relates to a power converter device (1) comprising; a first circuit board (100), the first circuit board comprising a first driver (102) and at least four GaN HEMT devices (101) arranged in pairs (103, 104), said pairs connected in parallel; a second circuit board (200), the second circuit board comprising a second driver (202), and at least four MOSFET devices (201) arranged in pairs (203, 204), said pairs connected in parallel; the power converter device comprises at least two electrical connections (20) between the two circuit boards; wherein the first circuit board extends in a first plane and the second circuit board extends in a second plane, and the first and second circuit boards are arranged one above the other such that the two planes extends in parallel and the electrical connections between the two circuit boards extends in a direction substantially perpendicular to said first and second planes; and wherein said at least four GaN HEMT devices (101) are electrically connected

Abstract: There is provided an AC-DC converter circuit (100) for high power charging of an electrical battery. The circuit comprises an input rectifier comprising a first node and a second node. The input rectifier (110) is configured to receive an AC voltage at the first node (112) and provide a rectified voltage at the second node (114). The circuit further comprises a first transistor (120), comprising a first gate node (122), a first source node (124), and a first drain node (126). The first drain node is connected to the second node of the input rectifier. The first gate node is connected to a ground node (170). The circuit further comprises a second transistor (130), comprising a second gate node (132), a second source node (134), and a second drain node (136). The second drain node is connected to the first source node. The second transistor materially corresponds to the first transistor.

Abstract: A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer.

Abstract: A method for forming a matrix of light-emitting diode (LED) elements (11, 21, 31) of different colours is provided. The method comprises epitaxially growing, on a GaN sacrificial layer (140), a first n-doped GaN layer (111), a first InxGa(1-X)N layer (112) and a first p-doped GaN layer (113) to form a first array of first LED elements (11) for emitting light of a first colour, and forming a first etch mask (151) comprising a plurality of first trenches (161). The method further comprises: epitaxially growing a second array of second LED elements (21), for emitting light of a second colour, in the plurality of first trenches; forming a second etch mask (152) protecting the second array and comprising a plurality of second trenches (162); and epitaxially growing a third array of third LED elements (31), for emitting light of a third colour, in the plurality of second trenches.

Abstract: There is provided a field-programmable gate array, FPGA, device (100) comprising a configurable logic block, CLB, (110) comprising a logic inverter (120) comprising a high-electron-mobility transistor, HEMT, (130), wherein the HEMT comprises: a Si substrate (384); an AlyGay-1N layer structure (380), wherein 0<y?1; a GaN layer structure (382); and a crystal transition layer structure (386) arranged on the Si substrate. The crystal transition layer comprises: a plurality of vertical nanowire structures (388) perpendicularly arranged on the Si substrate, and an AlxGax-1N layer structure (389), wherein 0?x<1, wherein the AlxGax-1N layer structure is arranged to vertically and laterally enclose the vertical nanowire structures. There is also provided an AI processing system comprising said FPGA device (100).

Abstract: There is provided a vertical high-electron-mobility transistor, HEMT (100), comprising: a drain contact (410), a nanowire layer (500) arranged on the drain contact (410) and comprising at least one vertical nanowire (510) and a supporting material (520) laterally enclosing the at least one vertical nanowire (510), a heterostructure (600) arranged on the nanowire layer and comprising an AIGaN-layer (610) and a GaN-layer (620) together forming a heterojunction, at least one source contact (420a, 420b) in contact with the heterostructure (600), and a gate contact (430) in contact with the heterostructure (600), arranged above the at least one vertical nanowire (510), wherein the at least one vertical nanowire (510) is forming an electron transport channel between the drain contact and the heterostructure. There is also provided a method for producing a vertical HEMT (100).

Abstract: Apparatuses and methods relating to semiconductor layer structures are disclosed. A method for producing a semiconductor layer structure ay involve providing a Si substrate comprising a top surface, forming a first semiconductor layer on the substrate, the first semiconductor layer comprising a plurality of vertical nanowire structures, arranged perpendicularly to the top surface of the substrate, the first semiconductor layer comprising AIN, and epitaxially growing a second semiconductor layer which laterally and vertically encloses the plurality of vertical nanowire structures thereby encapsulating dislocations in shells around the nanowires, wherein the second semiconductor layer comprises AlxGa1-xN, wherein 0:x:0.95.

Abstract: There is provided a monolithic microwave integrated circuit, MMIC, front-end module which may include: a gallium nitride structure supported by a silicon substrate, a silicon-based transmit/receive switch having a transmit mode and a receive mode, a transmit amplifier configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, formed in said gallium nitride structure. The MMIC front-end module may further include a receive amplifier configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected to said transmit/receive switch, wherein said receive amplifier may include a gallium nitride HEMT formed in said gallium nitride structure.

Abstract: There is provided a semiconductor layer structure (100) comprising: a Si substrate (102) having a top surface (104); a first semiconductor layer (110) arranged on said substrate, the first semiconductor layer comprising a plurality of vertical nanowire structures (112) arranged perpendicularly to said top surface of said substrate, the first semiconductor layer comprising AlN; a second semiconductor layer (120) arranged on said first semiconductor layer laterally and vertically enclosing said nanowire structures, the second semiconductor layer comprising AlxGa1-xN, wherein 0?x?0.95; a third semiconductor layer (130) arranged on said second semiconductor layer, the third semiconductor layer comprising AlyGa1-yN, wherein 0?y?0.95; and a fourth semiconductor layer (140) arranged on said third semiconductor layer, the fourth semiconductor layer comprising GaN. There is also provided a high-electron-mobility transistor device and methods of producing such structures and devices.