Abstract: A method for wafer testing an event-based vision sensor (EVS), the EVS sensor comprising a photodiode, a logarithmic amplifier configured to generate an amplified signal in response to voltage received by the photodiode, a first buffer, and a bitline (BL), the method including determining a performance of the logarithmic amplifier, where determining the performance includes irradiating a pixel array by sweeping irradiance, feeding an output of the pixel array into the BL, probing one or more output of the BL with an analog-to-digital converter (ADC), and monitoring the one or more outputs of the BL, wherein the performance is determined based upon the one or more outputs of the BL.

Abstract: Reconfigurable hybrid event-based vision sensor and CMOS image sensor systems (an associated systems, devices, and methods) are disclosed. In one embodiment, a hybrid image sensor includes a pixel circuit array with pixel circuits reconfigurable between (i) a CMOS image sensor (CIS) configuration for obtaining intensity information and (ii) an event vision sensor (EVS) configuration for obtaining contrast information. Control circuitry can reconfigure a first subset of pixel circuits into the EVS configuration based on detected motion in an external scene, switching the hybrid image sensor between (a) a CIS-only mode in which all pixel circuits operate in the CIS configuration and (b) a hybrid mode in which the first subset operates in the EVS configuration and a second subset operates in the CIS configuration. The control circuitry can control the number of pixel circuits included in the first subset based on luminance conditions in the external scene.

Abstract: A pixel circuit includes a photodiode configured to photogenerate charge in response to reflected modulated light incident upon the photodiode. A first floating diffusion is configured to store a first portion of charge photogenerated in the photodiode. A first transfer transistor is configured to transfer the first portion of charge from the photodiode to the first floating diffusion in response to a first phase signal. A first storage node is configured to store the first portion of charge from the first floating diffusion. A first decoupling circuit has a first output responsive to a first input. The first input is coupled to the first floating diffusion and the first output is coupled to first storage node. A voltage swing at the first output is greater than a voltage swing at the first input.

Abstract: A device has a first and second PPD sensor configured for placement over an artery; a camera between the first and second PPD sensors; and a processor having memory with firmware for determining pulse transit time (PTT) between the PPD sensors, and determines blood pressure (BP) therefrom using a calibrated conversion from PTT to BP. The firmware also obtains initial and subsequent images of the artery, extracts features, and adjusts calibrated conversion from PTT to BP based upon features extracted from the initial and subsequent images of the artery. In embodiments the processor enhances the initial and subsequent images of the artery using a structured light tomographic enhancement process. A method uses first and second PPD sensors placed over an artery to determine pulse transit time; obtains initial and subsequent images of the artery with a camera; and uses features extracted from the initial and subsequent images of the artery to adjust a calibrated conversion from PTT to BP.

Abstract: Event vision sensors with defect pixel suppression (and associated methods) are disclosed herein. In one embodiment, an event vision sensor includes an array of event vision pixels and an event signal processor. The event signal processor is configured to identify event vision pixels of the array that are defective based on noise event occurrence firing rates corresponding to the event vision pixels. The noise event occurrence firing rate for each event vision pixel can be based on inter-arrival times or a noise event rate corresponding to that event vision pixel. Each event vision pixel can include internal circuitry (e.g., a memory component, such as a latch) that can, when the event vision pixel is identified as defective, be used to disable the event vision pixel from detecting events or to mask an output of the event vision pixel such that events are not read out of the event vision pixel.

Abstract: A time-of-flight sensor includes an integrated circuit chip in which a voltage regulator and a load are disposed. The load includes a grouping of pixel circuits and modulation driver that is supplied power from the voltage regulator. The grouping of pixel circuits included in a pixel array disposed in the integrated circuit trip. Each one of the pixel circuits includes a photodiode configured to photogenerate charge in response to reflected modulated light, a floating diffusion configured to store a portion of charge photogenerated in the photodiode, and transfer transistor to transfer the portion of charge from the photodiode to the floating diffusion in response to a phase modulation signal generated by the modulation driver. A feedback circuit is coupled between the load and the voltage regulator and is coupled to receive a feedback signal from the feedback circuit in response to the load.

Abstract: A mixed analog/digital in-memory computing device implements matrix vector multiplication with reduced noise for use by a deep neural network (DNN). For each row of a cross-bar array a digital multiplier is split into a least significant (LS) portion and a most significant (MS) portion of different sizes that are preloaded into two cells on one row and two different columns of the cross-bar array. An input activation (IA) value is driven onto input conductors of each row and an analog-to-digital converter (ADC) converts output signals from the two columns as a MS partial sum and a LS partial sum. A gain is applied to the MS partial sum and added to the LS partial sum to form a resulting value for one node of the DNN.

Abstract: A time-of-flight pixel circuit includes a photodiode configured to generate charge in response to modulated light reflected from an object. First and second transfer transistors are coupled to the photodiode. The first transfer transistor transfers a first portion of charge from the photodiode in response to a first modulation signal and the second transfer transistor transfers a second portion of charge from the photodiode in response to a second modulation signal. The second modulation signal is an inverted first modulation signal. A first floating diffusion is coupled to the first transfer transistor to receive the first portion of charge in response to a first modulation signal. Each one of a first plurality of sample and hold transistors is coupled between a respective one of a first plurality of memory nodes and the first transfer transistor.

Abstract: Fixed pattern noise (FPN) reduction techniques in image sensors operated with pulse illumination are disclosed herein. In one embodiment, a method includes, during a first sub-exposure period of a frame, (a) operating a first tap of a pixel to capture a first signal corresponding to first charge at a first floating diffusion, the first charge corresponding to first light incident on a photosensor, and (b) operating a second tap of the pixel to capture a first parasitic signal corresponding to FPN at a second floating diffusion. The method further includes, during a second sub-exposure period of the frame, (a) operating the second tap to capture a second signal corresponding to second charge at the second floating diffusion, the second charge corresponding to second light incident on the photosensor, and (b) operating the first tap to capture a second parasitic signal corresponding to FPN at the first floating diffusion.

Abstract: Methods for transmitting asynchronous event data via synchronous communications interfaces (and associated imaging systems) are disclosed herein. In one embodiment, an imager comprises an array of event vision pixels, and a synchronous communications transmitter configured to transmit frames of data to a synchronous communications receiver. The pixels generate event data based on activity within an external scene. The imager communicates, at a first time and to the receiver, an anticipated amount of data that will be included in a frame transmitted to the receiver at a second time. The anticipated amount of data can be based on a prediction of an amount of event data that will be generated at a future point in time for transmission to the receiver in the frame. The imager can then transmit the frame to the receiver at the second time with an amount of data corresponding to the anticipated amount of data.

Abstract: Event vision sensors with event data compression (and associated systems, devices, and methods) are disclosed herein. In one embodiment, an event vision sensor includes a plurality of event vision pixels. Each event vision pixel of the plurality is configured to generate event data based on events indicated in incident light received from an external scene, and includes a compression circuit configured to compress the event data prior to readout of the event data from the event vision pixel. Each compression circuit can include a time aggregation circuit that is configured to track a number of the events detected by the corresponding event vision pixel over a specified timing window. The compressed event data can be read out from the event vision sensors and used to generate a pseudo-frame. The event vision sensor can optionally perform frame-level compression on the pseudo-frame.

Abstract: A pixel circuit includes a pixel array and a color filter. The pixel array includes pixels arranged in rows and columns, and each pixel includes a photodiode configured to photogenerate image charge in response to incident light, and a transfer transistor coupled to the photodiode to transfer the image charge out from the photodiode. The color filter array includes color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each of the pixels is coupled to a first readout circuit, and the plurality of pixels includes a first subset of the pixels not coupled to a second readout circuit and a second subset of the pixels coupled to the second readout circuit. Two diagonally arranged pixels are coupled together to share a floating diffusion, and the two diagonally arranged pixels coupled together are disposed underneath color filters of a same color.

Abstract: A pixel circuit includes a pixel array and a color filter. The pixel array includes a plurality of pixels arranged in rows and columns, each pixel including four photodiodes, a floating diffusion, and four transfer transistors. The color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each of the plurality of pixels is coupled to a first readout circuit, and the plurality of pixels includes (i) a first subset of the pixels not coupled to a second readout circuit and (ii) a second subset of the pixels coupled to the second readout circuit. Floating diffusions of two diagonally arranged pixels are coupled together, and the two diagonally arranged pixels coupled together are disposed underneath color filters of a same color.

Abstract: A pixel array includes photodiodes and a color filter array. A first fraction of the photodiodes is included in CIS pixels and a second fraction of the photodiodes is included in hybrid CIS/EVS pixels. The photodiodes are arranged into groupings. The color filter array includes first, second, and third color filters arranged in a mosaic pattern over the photodiodes. Each grouping includes a plurality of subgroupings including a first subgrouping disposed under at least one of the first color filters, a second subgrouping disposed under at least one of the second color filters, and a third subgrouping disposed under at least one of the third color filters. Each of the first, second, and third subgroupings includes at least one CIS pixel, and at least one of the first subgrouping of photodiodes further includes at least one hybrid CIS/EVS pixel disposed under at least one of the first color filters.

Abstract: Pixels with multiple operating modes (and associated systems, devices, and methods) are disclosed herein. In one embodiment, a pixel arrangement includes a pixel including a first photosensor, a second photosensor, a floating diffusion, a first event vision sensor (EVS) connection coupling the pixel to first EVS readout circuitry and configured to receive first charge from the first photosensor, and a second EVS connection coupling the pixel to second EVS readout circuitry and configured to receive second charge from the second photosensor. The pixel further includes a first transfer transistor selectively coupling the first photosensor to the floating diffusion, a second transfer transistor selectively coupling the first photosensor to the first EVS connection, and a third transfer transistor selectively coupling the second photosensor to the floating diffusion.

Abstract: Hybrid image sensors with multiple operating modes are disclosed herein. In one embodiment, a pixel arrangement includes a first photosensor, a first floating diffusion, a second photosensor, a second floating diffusion, and a mode switch. The mode switch can include (a) a first switch selectively coupling the second floating diffusion to the first floating diffusion, and (b) a second switch configured to selectively couple the second floating diffusion to event vision sensor (EVS) readout circuitry. The mode switch can be used to transition the pixel arrangement between (i) a first mode in which the pixel arrangement is controllable to output intensity information corresponding to first light incident on the first photosensor and/or second light incident on the second photosensor, and (ii) a second mode in which the pixel arrangement is controllable to output contrast information corresponding to the first light and/or the second light.

Abstract: A pixel circuit includes a pixel array and a color filter. The pixel array includes a plurality of pixels each comprising two photodiodes, a floating diffusion coupled between the two photodiodes, and two transfer transistor coupled between the two photodiodes and the floating diffusion. The color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each pixel is coupled to a first readout circuit. The pixels include a second subset of the pixels coupled to a second readout circuit and a first subset of the pixels not coupled to the second readout circuit. Each pair of pixels arranged in two adjacent rows includes a first pixel included in the second subset of the pixels and a second pixel included in the first subset of the pixels and disposed underneath one of the color filters.

Abstract: Hybrid image sensors with on-chip image deblur and rolling shutter distortion correction (and associated systems, devices, and methods) are disclosed herein. In one embodiment, an image sensor includes (a) an event driven sensing array including one or more event vision sensor (EVS) pixels, each configured to capture event data corresponding to contrast information of light incident on the EVS pixel; (b) a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, each CIS pixel configured to capture CIS data corresponding to intensity of light incident on the CIS pixel, and (c) a rolling shutter distortion correction circuit configured to correct the CIS data for rolling shutter distortion using the event data.

Abstract: Methods for operating hybrid image sensors having different CIS-to-EVS resolutions (and associated systems, devices, and methods) are disclosed herein. In one embodiment, an imaging system includes a hybrid image sensor including (a) an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows and configured to capture EVS data having an EVS resolution, and (b) a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows and configured to capture CIS data having a CIS resolution. The imaging system can further include control circuitry configured to adjust the CIS resolution of the CIS data and/or the EVS resolution of the EVS data such that a mismatch between the CIS resolution and the EVS resolution is reduced.

Abstract: Hybrid image sensors with adjustable contrast thresholds (and associated systems, devices, and methods) are disclosed herein. In one embodiment, an imaging system comprises one or more event vision sensor (EVS) pixels, and a plurality of CMOS image sensor (CIS) pixels. Each EVS pixel can be configured to, based on a contrast threshold, capture event data corresponding to contrast information of light incident on the EVS pixel. Each CIS pixel can be configured to capture CIS data corresponding to intensity of light incident on the CIS pixel. The imaging system can further comprise (i) a contrast threshold calibration circuit configured to adjust a value of the contrast threshold over time, and (ii) a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using at least a portion of the event data captured by the one or more EVS pixels.