Patents by Inventor Andrei Konstantinov

Andrei Konstantinov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894454
    Abstract: In a general aspect, a silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) can include a substrate of a first conductivity type, a drift region of the first conductivity type disposed on the substrate, a spreading layer of the first conductivity type disposed in the drift region, a body region of a second conductivity type disposed in the spreading layer, and a source region of the first conductivity type disposed in the body region. The SiC MOSFET can also include a gate structure that includes a gate oxide layer, an aluminum nitride layer disposed on the gate oxide layer, and a gallium nitride layer of the second conductivity disposed on the aluminum nitride layer.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: February 6, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei Konstantinov
  • Publication number: 20230411536
    Abstract: A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.
    Type: Application
    Filed: May 23, 2023
    Publication date: December 21, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Patent number: 11817478
    Abstract: In a general aspect, a semiconductor device can include a substrate of a first conductivity type, an active region disposed in the substrate, and a termination region disposed in the substrate adjacent to the active region. The termination region can include a junction termination extension (JTE) of a second conductivity type, where the second conductivity type is opposite the first conductivity type. The JTE can have a first depletion stopper region disposed in an upper portion of the JTE, a second depletion stopper region disposed in a lower portion of the JTE, and a high carrier mobility region disposed between the first depletion stopper region and the second depletion stopper region.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: November 14, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jaume Roig-Guitart, Fredrik Allerstam, Thomas Neyer, Andrei Konstantinov, Martin Domeij, Jangkwon Lim
  • Patent number: 11715804
    Abstract: A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: August 1, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei Konstantinov
  • Publication number: 20230055024
    Abstract: A power SiC MOSFET with a built-in Schottky rectifier provides advantages of including a Schottky rectifier, such as avoiding bipolar degradation, while reducing a parasitic capacitive charge and related power losses, as well as system cost. A lateral built-in channel layer may enable lateral spacing of the MOSFET gate oxide from a high electric field at the Schottky contact, while also providing current limiting during short-circuit events.
    Type: Application
    Filed: September 13, 2022
    Publication date: February 23, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Patent number: 11476369
    Abstract: A power SiC MOSFET with a built-in Schottky rectifier provides advantages of including a Schottky rectifier, such as avoiding bipolar degradation, while reducing a parasitic capacitive charge and related power losses, as well as system cost. A lateral built-in channel layer may enable lateral spacing of the MOSFET gate oxide from a high electric field at the Schottky contact, while also providing current limiting during short-circuit events.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: October 18, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei Konstantinov
  • Publication number: 20220199764
    Abstract: In a general aspect, a semiconductor device can include a substrate of a first conductivity type, an active region disposed in the substrate, and a termination region disposed in the substrate adjacent to the active region. The termination region can include a junction termination extension (JTE) of a second conductivity type, where the second conductivity type is opposite the first conductivity type. The JTE can have a first depletion stopper region disposed in an upper portion of the JTE, a second depletion stopper region disposed in a lower portion of the JTE, and a high carrier mobility region disposed between the first depletion stopper region and the second depletion stopper region.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jaume ROIG-GUITART, Fredrik ALLERSTAM, Thomas NEYER, Andrei KONSTANTINOV, Martin DOMEIJ, Jangkwon LIM
  • Publication number: 20220131015
    Abstract: A power SiC MOSFET with a built-in Schottky rectifier provides advantages of including a Schottky rectifier, such as avoiding bipolar degradation, while reducing a parasitic capacitive charge and related power losses, as well as system cost. A lateral built-in channel layer may enable lateral spacing of the MOSFET gate oxide from a high electric field at the Schottky contact, while also providing current limiting during short-circuit events.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Publication number: 20220131016
    Abstract: SiC Schottky rectifiers are described with a Silicon Carbide (SiC) layer, a metal contact, and an n-type channel region disposed between the SiC layer and the metal contact. A p-pillar may be formed adjacent to the metal contact and extending in a direction of the SiC layer, and a a p-type shielding body adjacent to the metal contact and extending from the metal contact in a direction of the SiC layer. The SiC Schottky rectifiers may include a first channel region of the n-type channel region having a first n-type doping concentration, and disposed between the p-pillar and the p-type shielding body, the first channel region being adjacent to the metal contact. The SiC Schottky rectifiers may include an n-pillar providing a second channel region of the n-type channel region and having a second n-type doping concentration that is lower than the first n-type doping concentration in the first channel region, the n-pillar being disposed adjacent to the first channel region, and to the p-pillar.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Publication number: 20220029033
    Abstract: A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.
    Type: Application
    Filed: October 13, 2021
    Publication date: January 27, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Publication number: 20220013661
    Abstract: In a general aspect, a silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) can include a substrate of a first conductivity type, a drift region of the first conductivity type disposed on the substrate, a spreading layer of the first conductivity type disposed in the drift region, a body region of a second conductivity type disposed in the spreading layer, and a source region of the first conductivity type disposed in the body region. The SiC MOSFET can also include a gate structure that includes a gate oxide layer, an aluminum nitride layer disposed on the gate oxide layer, and a gallium nitride layer of the second conductivity disposed on the aluminum nitride layer.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Patent number: 11171248
    Abstract: SiC Schottky rectifier 100 with surge current ruggedness. As referenced above, the Schottky rectifier 100 may be configured to provide multiple types of surge current protection.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: November 9, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei Konstantinov
  • Patent number: 11139394
    Abstract: In a general aspect, a silicon carbide (SiC) field-effect transistor (FET) can include a substrate of a first conductivity type, a drift region of the first conductivity type disposed on the substrate, a spreading layer of the first conductivity type disposed in the drift region, a body region of a second conductivity type disposed in the spreading layer, and a source region of the first conductivity type disposed in the body region. The SiC FET can further include a spacer layer of the first conductivity type disposed on the source region the body region and the spreading layer, and a lateral channel region of the first conductivity type disposed in the spacer layer. The SiC FET can also include a gate structure that includes an aluminum nitride layer disposed on the lateral channel region, and an aluminum gallium nitride layer of the second conductivity disposed on the AlN layer.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: October 5, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei Konstantinov
  • Publication number: 20210066488
    Abstract: In a general aspect, a silicon carbide (SiC) field-effect transistor (FET) can include a substrate of a first conductivity type, a drift region of the first conductivity type disposed on the substrate, a spreading layer of the first conductivity type disposed in the drift region, a body region of a second conductivity type disposed in the spreading layer, and a source region of the first conductivity type disposed in the body region. The SiC FET can further include a spacer layer of the first conductivity type disposed on the source region the body region and the spreading layer, and a lateral channel region of the first conductivity type disposed in the spacer layer. The SiC FET can also include a gate structure that includes an aluminum nitride layer disposed on the lateral channel region, and an aluminum gallium nitride layer of the second conductivity disposed on the AlN layer.
    Type: Application
    Filed: October 29, 2019
    Publication date: March 4, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Publication number: 20200259022
    Abstract: SiC Schottky rectifier 100 with surge current ruggedness. As referenced above, the Schottky rectifier 100 may be configured to provide multiple types of surge current protection.
    Type: Application
    Filed: July 16, 2019
    Publication date: August 13, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Patent number: 10707340
    Abstract: In a general aspect, a silicon carbide (SiC) rectifier can include a substrate of a first conductivity type, a drift region of the first conductivity type, a junction field effect transistor (JFET) region of the first conductivity type, a body region of a second conductivity type, an anode implant region of the first conductivity type, and a channel of the first conductivity type. The channel can be in contact with and disposed between the JFET region and the anode implant region. A portion of the channel between the anode implant region and the JFET region can be disposed in the body region, The channel can be configured to be off under zero-bias conditions, and on at a positive turn-on voltage.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: July 7, 2020
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Andrei Konstantinov
  • Patent number: 10629686
    Abstract: A semiconductor power device may include a Silicon Carbide (SiC) layer having an active power device formed on a first surface thereof. An Ohmic contact layer may be formed on a second, opposing surface of the SiC layer, the Ohmic contact layer including Nickel Silicide (NiSix) with a first silicide region containing a first precipitate of non-reacted carbon disposed between the SiC layer and a second silicide region. The second silicide region may be disposed between the first silicide region and a third silicide region, and may include a mixture of a first precipitate of refractory metal carbide and a second precipitate of non-reacted carbon. The third silicide region may contain a second precipitate of refractory metal carbide. A solder metal layer may be formed on the Ohmic contact layer, with the third silicide region disposed between the second silicide region and the solder metal layer.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: April 21, 2020
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Thi Thu Phuong Pham, Kyeongseok Park, Andrei Konstantinov, Thomas Neyer
  • Publication number: 20200083365
    Abstract: In a general aspect, a silicon carbide (SiC) rectifier can include a substrate of a first conductivity type, a drift region of the first conductivity type, a junction field effect transistor (JFET) region of the first conductivity type, a body region of a second conductivity type, an anode implant region of the first conductivity type, and a channel of the first conductivity type. The channel can be in contact with and disposed between the JFET region and the anode implant region. A portion of the channel between the anode implant region and the JFET region can be disposed in the body region, The channel can be configured to be off under zero-bias conditions, and on at a positive turn-on voltage.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 12, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Andrei KONSTANTINOV
  • Publication number: 20200044031
    Abstract: A semiconductor power device may include a Silicon Carbide (SiC) layer having an active power device formed on a first surface thereof. An Ohmic contact layer may be formed on a second, opposing surface of the SiC layer, the Ohmic contact layer including Nickel Silicide (NiSix) with a first silicide region containing a first precipitate of non-reacted carbon disposed between the SiC layer and a second silicide region. The second silicide region may be disposed between the first silicide region and a third silicide region, and may include a mixture of a first precipitate of refractory metal carbide and a second precipitate of non-reacted carbon. The third silicide region may contain a second precipitate of refractory metal carbide. A solder metal layer may be formed on the Ohmic contact layer, with the third silicide region disposed between the second silicide region and the solder metal layer.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 6, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Thi Thu Phuong PHAM, Kyeongseok PARK, Andrei KONSTANTINOV, Thomas NEYER
  • Patent number: 10504989
    Abstract: In at least one general aspect, a silicon carbide (SiC) device can include a drift region and a termination region at least partially surrounding the SiC device. The termination region can have a first transition zone and a second transition zone. The first transition zone can be disposed between a first zone and a second zone, and the second zone can have a top surface lower in depth than a depth of a top surface of the first zone. The first transition zone can have a recess, and the second transition zone can be disposed between the second zone and a third zone.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: December 10, 2019
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Andrei Konstantinov