Patents by Inventor Andrew M. Bayless

Andrew M. Bayless has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190252575
    Abstract: A method of processing a device wafer comprising applying a sacrificial material to a surface of a carrier wafer, adhering a surface of the device wafer to an opposing surface of the carrier wafer, planarizing an exposed surface of the sacrificial material by removing only a portion of a thickness thereof, and planarizing an opposing surface of the device wafer. A wafer assembly is also disclosed.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventor: Andrew M. Bayless
  • Publication number: 20190198388
    Abstract: A method for processing semiconductor dice comprises removing material from a surface of a semiconductor wafer to create a pocket surrounded by a sidewall at a lateral periphery of the semiconductor wafer, forming a film on a bottom of the pocket and securing semiconductor dice to the film in mutually spaced locations. A dielectric molding material is placed in the pocket over and between the semiconductor dice, material is removed from another surface of the semiconductor wafer to expose the film, bond pads of the semiconductor dice are exposed, redistribution layers in electrical communication with the bond pads of associated semiconductor dice are formed, and the redistribution layers and associated semiconductor dice are singulated along spaces between the semiconductor dice.
    Type: Application
    Filed: November 26, 2018
    Publication date: June 27, 2019
    Inventors: Andrew M. Bayless, James M. Derderian, Xiao Li
  • Patent number: 10325926
    Abstract: Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: June 18, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Ming Zhang, Andrew M. Bayless, John K. Zahurak
  • Patent number: 10326044
    Abstract: A method of processing a device wafer comprising applying a sacrificial material to a surface of a carrier wafer, adhering a surface of the device wafer to an opposing surface of the carrier wafer, planarizing an exposed surface of the sacrificial material by removing only a portion of a thickness thereof, and planarizing an opposing surface of the device wafer. A wafer assembly is also disclosed.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: June 18, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Andrew M. Bayless
  • Publication number: 20190148335
    Abstract: Semiconductor device assemblies may include a carrier wafer and a thermoset adhesive on a surface of the carrier wafer. A metal barrier material may be located on the thermoset adhesive. A thermoplastic adhesive may be located on an opposite side of the metal barrier material from the thermoset adhesive. A device wafer may be located on an opposite side of the thermoplastic material from the metal barrier material. Semiconductor device processing systems may include a carrier wafer having a thermoset adhesive adhered to a surface thereof and a metal barrier material adhered to the thermoset adhesive opposite the carrier wafer.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 16, 2019
    Inventors: Andrew M. Bayless, Joseph M. Brand
  • Publication number: 20190057901
    Abstract: A method of processing a device wafer comprising applying a sacrificial material to a surface of a carrier wafer, adhering a surface of the device wafer to an opposing surface of the carrier wafer, planarizing an exposed surface of the sacrificial material by removing only a portion of a thickness thereof, and planarizing an opposing surface of the device wafer. A wafer assembly is also disclosed.
    Type: Application
    Filed: August 18, 2017
    Publication date: February 21, 2019
    Inventor: Andrew M. Bayless
  • Publication number: 20190051630
    Abstract: Methods of detaching semiconductor device structures from carrier structures may involve directing a laser through a carrier structure comprising a semiconductor material to a barrier material located between the carrier structure and a semiconductor device structure adhere to an opposite side of the barrier material. A bond between the carrier structure and an adhesive material temporarily securing the carrier structure to the semiconductor device structure may be released in response to heating of the barrier material by the laser beam. The carrier structure may be removed from the semiconductor device structure, the barrier material removed, and an adhesive bonding the semiconductor device structure to the barrier material removed.
    Type: Application
    Filed: August 11, 2017
    Publication date: February 14, 2019
    Inventors: Andrew M. Bayless, Joseph M. Brand
  • Patent number: 10163693
    Abstract: A method for processing semiconductor dice comprises removing material from a surface of a semiconductor wafer to create a pocket surrounded by a sidewall at a lateral periphery of the semiconductor wafer, forming a film on a bottom of the pocket and securing semiconductor dice to the film in mutually spaced locations. A dielectric molding material is placed in the pocket over and between the semiconductor dice, material is removed from another surface of the semiconductor wafer to expose the film, bond pads of the semiconductor dice are exposed, redistribution layers in electrical communication with the bond pads of associated semiconductor dice are formed, and the redistribution layers and associated semiconductor dice are singulated along spaces between the semiconductor dice.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: December 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Andrew M. Bayless, James M. Derderian, Xiao Li
  • Patent number: 9716023
    Abstract: A method of bonding a device wafer to a carrier wafer includes disposing a first adhesive over a central portion of a carrier wafer, the first adhesive having a first glass transition temperature, disposing a second adhesive over a peripheral portion of the carrier wafer, the second adhesive having a second glass transition temperature greater than the first glass transition temperature, and bonding the first adhesive to an active front side of the device wafer and the second adhesive to a peripheral portion of the front side of the device wafer. Related assemblies may be used in such methods.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: July 25, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sharon N. Farrens, Neal Bowen, Andrew M. Bayless
  • Publication number: 20170194351
    Abstract: Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.
    Type: Application
    Filed: March 20, 2017
    Publication date: July 6, 2017
    Applicant: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Ming Zhang, Andrew M. Bayless, John K. Zahurak
  • Patent number: 9608119
    Abstract: Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: March 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Ming Zhang, Andrew M. Bayless, John K. Zahurak
  • Publication number: 20160020129
    Abstract: A method of bonding a device wafer to a carrier wafer includes disposing a first adhesive over a central portion of a carrier wafer, the first adhesive having a first glass transition temperature, disposing a second adhesive over a peripheral portion of the carrier wafer, the second adhesive having a second glass transition temperature greater than the first glass transition temperature, and bonding the first adhesive to active front side of the device wafer and the second adhesive to a peripheral portion of the front side of the device wafer. Related assemblies may be used in such methods.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 21, 2016
    Inventors: Sharon N. Farrens, Neal Bowen, Andrew M. Bayless
  • Publication number: 20110215407
    Abstract: Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 8, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sanh D. Tang, Ming Zhang, Andrew M. Bayless, John K. Zahurak