Patents by Inventor Andrew Marshall
Andrew Marshall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250119606Abstract: A prediction model is generated for a user using data regarding how the user responded to different positionings of items of ancillary content. The prediction model is used to determine respective positionings of a plurality of items of ancillary content. The items of ancillary content are streamed to and displayed by a user device as interstitial content using the determined respective positionings. Frames of an item of primary content may be analyzed to identify appropriate interstitial insertion points and to generate labels. The labels may be utilized by a remote system to select and stream interstitial content for the insertion points. The user's location may be determined and used to determine a maximum amount of ancillary content for a corresponding time period. Different amounts of ancillary content for a given time period may be provided to different users based on a registration state.Type: ApplicationFiled: December 18, 2024Publication date: April 10, 2025Inventors: Chan V. Hou, Spencer Adam Shanson, Pavlo Kalmykov Vasilievich, Jonathan Michael Jesperson, Adrian Chiu, Steven Ernest Riedl, Upendra Mohan Sharma, Dinh Khang Duong, Clayton Andrew Marshall
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Publication number: 20250074832Abstract: A method of producing reaction bonded silicon carbide (RB-SiC) ceramic components containing internal channels is described. In some embodiments, methods as described herein may utilize diamond powder at the interface of two or more preformed sections.Type: ApplicationFiled: August 29, 2023Publication date: March 6, 2025Inventors: Andrew Marshall, Sean McAnany, Samuel Salamone, Jiwen Wang, Michael Aghajanian
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Publication number: 20250049904Abstract: The present application is directed to immunomodulatory compositions comprising invariant NKT cell (iNKT cell) agonist compounds that induce expansion of tissue resident memory T-cells (Trm Cells) in combination with an immune stimulator agent that enhances an immune response to a target antigen or a polynucleotide encoding the immune stimulator. The iNKT agonists are ?-GalCer analogue compounds modified at the 6 position of the galactose ring. The immune stimulator is an antigen or an mRNA encoding an antigen to create a vaccine formulation. These combinations are used in the treatment of infection or cancer in a subject, or to enrich the number of Trm cells in the liver of a subject.Type: ApplicationFiled: December 22, 2022Publication date: February 13, 2025Inventors: Gavin Frank Painter, Ian Francis Hermans, Mitch Ganley, William Heath, Lauren Holz, Regan James Anderson, Benjamin Jason Compton, Andrew Marshall
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Patent number: 12221971Abstract: A compressor has: a rotor and a shroud having a internal and external sides and an air outlet; an annular case mounted to the external side and enclosing a plenum, the annular case having inner and outer sides and defining an aperture; a valve mounted to the annular case at the aperture and having: a support secured to the annular case and defining a seat surrounding a bleed passage, the seat located on the outer side, the support defining a guiding aperture, and a valve member having a head and a stem slidably received within the guiding aperture, the valve member having a closed position and an open position, the head abutting the valve seat in the closed position and offset from the valve seat in the open position; and an actuator engaged to the valve member for moving the valve member between the closed position and the open position.Type: GrantFiled: November 30, 2023Date of Patent: February 11, 2025Assignee: PRATT & WHITNEY CANADA CORP.Inventors: David Menheere, Andrew Marshall
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Publication number: 20240354743Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel. Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: ApplicationFiled: April 9, 2024Publication date: October 24, 2024Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 12063788Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.Type: GrantFiled: January 25, 2022Date of Patent: August 13, 2024Assignees: NUTECH VENTURES, GEORGIA TECH RESEARCH CORPORATION, THE TRUSTEES OF INDIANA UNIVERSITY, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Peter A. Dowben, Ruihua Cheng, Xiaoshan Xu, Alpha T. N'Diaye, Aaron Mosey, Guanhua Hao, Thilini K. Ekanayaka, Xuanyuan Jiang, Andrew J. Yost, Andrew Marshall, Azad J. Naeemi
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Publication number: 20240247366Abstract: Disclosed herein are bonded diamond composites that may include a ceramic composite layer, a diamond film layer, and a silicon carbide bonding layer bonding the diamond film layer to the ceramic composite layer. Example ceramic composite layers disclosed herein include diamond particles within a silicon carbide matrix. Methods of making bonded diamond composites through infiltration bonding are disclosed herein. Example methods include exposing a ceramic preform to molten silicon such that the silicon infiltrates into and through the silicon preform to a diamond film interfaced with the ceramic preform. Example methods include reacting the silicon with the ceramic preform and the diamond film to form a silicon carbide bonding layer bonding the diamond film to the resulting ceramic composite layer.Type: ApplicationFiled: January 23, 2023Publication date: July 25, 2024Inventors: Andrew Marshall, Glenn EVANS, Samuel SALAMONE, Michael AGHAJANIAN
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Publication number: 20240246048Abstract: An apparatus includes a blender lid configured to cover an opening in a blender receptacle and a lid arm coupled to the blender lid and coupled rotationally about a first horizontal axis. The lid arm is configured to rotate about the first horizontal axis to selectively position the blender lid to cover and uncover the opening in the blender receptacle. The blender arm may rotate the blender lid about the first horizontal axis to cover the opening in the blender receptacle and apply a downward force on the blender lid to seal the opening of the blender receptacle with the blender lid. The blender arm may include a horizontal rod having a longitudinal axis that corresponds to the first horizontal axis and having a first end attached to the blender lid.Type: ApplicationFiled: April 4, 2024Publication date: July 25, 2024Inventors: Vipin JAIN, Venkateswaran AYALUR, Vijayasimha DODDABALAPUR, Kevin Andrew MARSHALL
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Publication number: 20240179188Abstract: A system and method for authorization policy analysis. A policy analyzer answers first-order questions about authorization policies by reducing the policies to Satisfiability modulo theories (SMT). Input to the analyzer includes a policy to be analyzed and a schema for that policy. If the policy passes strict validation against the schema, then the analyzer symbolically evaluates the policy to encode its semantics as an SMT expression. The SMT expression is used for formulate a desired query about policy behavior such as, for example, if there is any input on which two policies both evaluate to true. The reduction to SMT produces a quantifier-free formula in a combination of decidable theories to support large scale deployments. This reduction is achieved by focusing the analysis on policies that pass strict validation, rather than attempting to analyze arbitrary policies.Type: ApplicationFiled: November 28, 2022Publication date: May 30, 2024Inventors: Emina TORLAK, Kyle HEADLEY, Michael W. HICKS, Neha RUNGTA, Andrew Marshall WELLS
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Publication number: 20240179181Abstract: A system and method for authorization policy evaluation. Authorization policies are authored in a general-purpose authorization language. An evaluation engine is used in a provider network by application developers to manage access within their applications based on fine-grained permissions. The policy language combines elements of role-based and attributed-based access control within an intuitive syntax and efficient evaluation strategy. The policy syntax separates role-based expressions of a policy from attribute-based expressions of the policy.Type: ApplicationFiled: November 28, 2022Publication date: May 30, 2024Inventors: Emina TORLAK, Darin MCADAMS, Neha RUNGTA, Michael W. HICKS, Craig Ryan DISSELKOEN, Aaron Joseph ELINE, John Holman KASTNER, Kyle HEADLEY, Anwar MAMAT, Richard Matthew MCCUTCHEN, Andrew Marshall WELLS, Kesha Hanne HIETALA, Shaobo HE, Mark Edward STALZER, Julian LOVELOCK
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Patent number: 11978038Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: GrantFiled: May 6, 2022Date of Patent: May 7, 2024Assignee: PAYPAL, INC.Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 11964247Abstract: An apparatus includes a blender lid configured to cover an opening in a blender receptacle and a lid arm coupled to the blender lid and coupled rotationally about a first horizontal axis. The lid arm is configured to rotate about the first horizontal axis to selectively position the blender lid to cover and uncover the opening in the blender receptacle. The blender arm may rotate the blender lid about the first horizontal axis to cover the opening in the blender receptacle and apply a downward force on the blender lid to seal the opening of the blender receptacle with the blender lid. The blender arm may include a horizontal rod having a longitudinal axis that corresponds to the first horizontal axis and having a first end attached to the blender lid.Type: GrantFiled: March 6, 2020Date of Patent: April 23, 2024Assignee: 6D BYTES INC.Inventors: Vipin Jain, Venkateswaran Ayalur, Vijayasimha Doddabalapur, Kevin Andrew Marshall
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Publication number: 20230360024Abstract: Methods and systems for digital hot wallet protection are provided. A payment channel is established via a Layer-2 network of a cryptocurrency blockchain for transferring a cryptocurrency balance from a first digital wallet of a service provider to a second digital wallet of a trusted entity over a plurality of commitment transactions. A transaction receipt for each commitment transaction is transmitted to the trusted entity via a secure communication channel previously established between the service provider and the trusted entity outside of the Layer-2 network. A transaction log of the service provider is modified so that it no longer represents the current transaction state of the payment channel Responsive to detecting a breach of the first wallet, a transaction is broadcast to a Layer-1 network of the blockchain for transferring the total cryptocurrency balance from the first wallet to the second wallet.Type: ApplicationFiled: May 6, 2022Publication date: November 9, 2023Inventors: Jakub Burgis, Raoul Johnson, Andrew Marshall, Muhammad Saad
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Patent number: 11764786Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: GrantFiled: May 29, 2022Date of Patent: September 19, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11757449Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: GrantFiled: May 29, 2022Date of Patent: September 12, 2023Assignees: BOARD OF REGENT'S OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11673752Abstract: In one embodiment, the present disclosure includes a dispenser vane comprising a flexible outer surface and a plurality of flexible teeth arranged along the length of the outer surface. The flexible outer surface and flexible teeth are radially moveable.Type: GrantFiled: September 17, 2021Date of Patent: June 13, 2023Assignee: 6D Bytes Inc.Inventors: Vipin Jain, Venkateswaran Ayalur, Vijayasimha Doddabalapur, Kevin Andrew Marshall, Jessica Pei-Sheng Murphy
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Patent number: 11658663Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: GrantFiled: May 29, 2022Date of Patent: May 23, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATION, Board OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Publication number: 20220294450Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294448Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294449Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV