Abstract: Improved process flows and methods are provided herein for fabricating a transistor on a substrate. In the disclosed process flows and methods, a contact etch stop layer (CESL) is conformally deposited directly onto a plurality of transistor structures, and a sacrificial layer is conformally deposited directly onto the CESL to protect the CESL from oxidation and thinning during subsequent processing step(s). The sacrificial layer improves the etch stop capability of the CESL during a subsequently performed oxide etch process. By providing a CESL with improved etch stop capability, the disclosed process flows and methods provide a controlled CESL etch process, which reduces or avoids damage to underlying transistor structures.

Abstract: An exemplary method of forming a semiconductor device includes forming, in a substrate, an active region protruding vertically from a major surface of the substrate, the active region including a semiconductor source-drain (S/D) region and a first 3-D channel structure, the S/D region physically contacting the first 3-D channel structure, and forming an opening extending into the S/D region, the opening having a depth greater than half of a height of the first 3-D channel structure; and forming a metallic plug in the opening, the metallic plug making electrical contact with the S/D region.

Abstract: A method for etching high-aspect ratio recessed features in an amorphous carbon layer is presented. The method includes providing a substrate containing an amorphous carbon layer and a patterned mask layer, plasma-etching a recessed feature through less than an entire thickness of the amorphous carbon layer using the patterned mask, forming a passivation layer on a sidewall of the etched amorphous carbon layer in the recessed feature by exposing the substrate to a passivation gas in the absence of a plasma, and repeating the plasma-etching and forming the passivation layer at least once to extend the recessed feature in the amorphous carbon layer.

Abstract: Improved process flows and methods are provided herein for forming a passivation layer on sidewall surfaces of openings formed in an amorphous carbon layer (ACL) to avoid bowing during an ACL etch process. More specifically, improved process flows and methods are provided to form a silicon-containing passivation layer on sidewall surfaces of the openings created within the ACL without utilizing atomic layer deposition (ALD) techniques or converting the silicon-containing passivation layer to an oxide or a nitride. As such, the improved process flows and methods disclosed herein may be used to protect the sidewall surfaces of the ACL and prevent bowing during the ACL etch process, while also reducing processing time and improving throughput.

Abstract: A method for forming a device includes forming a hole pattern in a resist layer disposed over a substrate. The substrate includes contact regions disposed over a major surface of the substrate and a dielectric layer disposed over the contact regions. The resist layer is disposed over the dielectric layer and the hole pattern includes through openings in the resist layer that are aligned with the contact regions. The through openings include a first through opening having a first critical dimension and a second through opening having a second critical dimension greater than the first critical dimension. The method includes modifying the hole pattern by depositing a material including silicon within the through openings by exposing the hole pattern to a first plasma generated from a gas mixture including SiCl4 and hydrogen, and then etching holes in the dielectric layer through the modified hole pattern, exposing the contact regions.

Abstract: Methods and systems for etching SiCN with mutli-color selectivity may include receiving the substrate having a multi-line layer formed thereon, the multi-line layer including a region having a pattern of alternating lines of a plurality of materials, wherein each line has a horizontal thickness, a vertical height, and extends horizontally across an underlying layer, wherein each line of the pattern of alternating lines extends vertically from a top surface of the multi-line layer to a bottom surface of the multi-line layer. Such a method may also include forming a patterned recess in the multi-line layer to expose at least a first component of the multi-line layer and a second component of the multi-line layer. An embodiment of a method many also include etching the first component with a non-corrosive etch process that is selective to the second component.

Abstract: In certain embodiments, a method of forming a semiconductor device includes receiving a substrate having an etch mask layer that includes features for preserving corresponding portions of an underlying hard mask layer to be etched during an etching process. The method includes patterning the hard mask layer using the etch mask layer to gradually form a recess in the hard mask layer, the recess having a depth greater than a width of a top surface of a first feature of the etch mask layer, by performing the etching process. The etching process includes alternating between: depositing, using a first plasma, a silicon-containing protective layer over the etch mask layer and the hard mask layer such that the protective layer covers exposed surfaces of the hard mask layer; and subsequently etching, using a second plasma that comprises oxygen, the hard mask layer to form an incremental portion of the recess.

Abstract: Improved process flows and methods are provided herein for forming a passivation layer on sidewall surfaces of openings formed in an amorphous carbon layer (ACL) to avoid bowing during an ACL etch process. More specifically, improved process flows and methods are provided to form a silicon-containing passivation layer on sidewall surfaces of the openings created within the ACL without utilizing atomic layer deposition (ALD) techniques or converting the silicon-containing passivation layer to an oxide or a nitride. As such, the improved process flows and methods disclosed herein may be used to protect the sidewall surfaces of the ACL and prevent bowing during the ACL etch process, while also reducing processing time and improving throughput.

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a nitride etch stop layer aligned to a gate electrode and a metal-based etch stop layer aligned to a source/drain contact region. The method further includes selectively etching the metal-based etch stop layer, to remove the metal-based etch stop layer and expose a surface of the source/drain contact region, by exposing the semiconductor substrate to a plasma formed in a gas comprising a corrosive material and fluorocarbon.

Abstract: Systems and methods are provided herein for etch features on a substrate, while maintaining a near-unity critical dimension (CD) shrink ratio. The features etched may include, but are not limited to contacts, vias, etc. More specifically, the techniques described herein use a pulsed plasma to control the polymer build-up ratio between the major CD and minor CD of the feature, and thus, control the CD shrink ratio when etching features having substantially different major and minor dimensions. The CD shrink ratio is controlled by selecting or adjusting one or more operational parameters (e.g., duty cycle, RF power, etch chemistry, etc.) of the plasma etch process(es) to control the amount of polymer build-up at the major and minor dimensions of the feature.

Abstract: Embodiments are disclosed for processing microelectronic workpieces having patterned structures to improve mandrel pull from spacers for multi-color patterning. The disclosed embodiments form patterned structures on a substrate including mandrels, form spacers adjacent the mandrels that are recessed such that a height of the spacers is less than the height of the mandrels, form protective caps over the spacers while exposing top surfaces of the mandrels, and remove the mandrels to leave a spacer pattern with cap protection. The remaining spacer pattern can then be transferred to underlying layers in additional process steps. The recessing of the spacers and formation of the protective caps tends to reduce or eliminate spacer damage suffered by prior solutions during mandrel pull from spacers for multi-color patterning.

Abstract: In one embodiment, a method includes providing a substrate comprising a source/drain contact region and a dummy gate, forming a first etch stop layer aligned to the source/drain contact region, where the first etch stop layer does not cover the dummy gate. The method may include forming a second etch stop layer over the first etch stop layer, the second etch stop layer covering the first etch stop layer and the dummy gate. The method may include converting the dummy gate to a metal gate. The method may include removing the second etch stop layer using a plasma etching process. The method may include removing the first etch stop layer.

Abstract: Methods and systems for etching SiCN with mutli-color selectivity may include receiving the substrate having a multi-line layer formed thereon, the multi-line layer including a region having a pattern of alternating lines of a plurality of materials, wherein each line has a horizontal thickness, a vertical height, and extends horizontally across an underlying layer, wherein each line of the pattern of alternating lines extends vertically from a top surface of the multi-line layer to a bottom surface of the multi-line layer. Such a method may also include forming a patterned recess in the multi-line layer to expose at least a first component of the multi-line layer and a second component of the multi-line layer. An embodiment of a method many also include etching the first component with a non-corrosive etch process that is selective to the second component.

Abstract: A process is provided in which etched layer(s) are protected from residues or defects caused by or resulting from exposure to atmospheric conditions. Protection is provided through the formation of an encapsulation layer post etch. In one embodiment, the encapsulation is provided by a thin layer formed in an atomic layer deposition (ALD) process. The thin layer prevents the etched layer(s) from exposure to air. This encapsulation process may take place after the etch process thus allowing for substrates to be subsequently exposed to atmospheric conditions with little or no queue time constraints being needed for staging subsequent wet clean processing steps. In one embodiment, the encapsulation process may be performed with no vacuum break between the etch process and the encapsulation process. In one embodiment, the encapsulation film is compatible with subsequent wet process steps and can be removed during this wet process steps without adverse effects.

Abstract: Embodiments are disclosed for a method to process microelectronic workpieces including forming a metal hard mask layer including ruthenium (Ru MHM layer) over one or more underlying layers on a substrate for a microelectronic workpiece, etching the Ru MHM layer to provide a patterned Ru MHM layer, and etching the one or more underlying layers using the patterned Ru MHM layer as a mask to protect portion of the one or more underlying layers. For one embodiment, the Ru MHM layer is a material including 95 percent or more of ruthenium (Ru). For another embodiment, the Ru MHM layer is a material including 70 percent or more of ruthenium (Ru). Further, the Ru MHM layer preferably has a selectivity of 10 or greater with respect to a next underlying layer adjacent to the Ru MHM layer, such as a SiN hard mask layer.

Abstract: Embodiments provide anisotropic etch processes for silicon carbon nitride (SiCN) or other materials within multi-color structures with improved selectivity to materials in adjacent lines. Cyclic surface modification and activation processes are used to achieve an anisotropic etch with desired selectivity with respect to other materials in a multi-color structure. For example embodiments, selectivity of a first material, such as SiCN or silicon nitride, with respect to other materials in adjacent lines for the multi-color structure is achieved using the cyclic modification/activation processes. The materials within the multi-color structure can include, for example, silicon, silicon nitride, silicon carbon oxide, silicon oxide, titanium nitride, and/or other materials. For one embodiment, hydrogen is introduced to process chemistry to facilitate the surface modification. For one embodiment, a non-corrosive gas, such as nitrogen trifluoride, is included in the process chemistry with the hydrogen.

Abstract: Embodiments provide anisotropic etch processes for silicon carbon nitride (SiCN) or other materials within multi-color structures with improved selectivity to materials in adjacent lines. Cyclic surface modification and activation processes are used to achieve an anisotropic etch with desired selectivity with respect to other materials in a multi-color structure. For example embodiments, selectivity of a first material, such as SiCN or silicon nitride, with respect to other materials in adjacent lines for the multi-color structure is achieved using the cyclic modification/activation processes. The materials within the multi-color structure can include, for example, silicon, silicon nitride, silicon carbon oxide, silicon oxide, titanium nitride, and/or other materials. For one embodiment, hydrogen is introduced to process chemistry to facilitate the surface modification. For one embodiment, a non-corrosive gas, such as nitrogen trifluoride, is included in the process chemistry with the hydrogen.

Abstract: A process is provided in which etched layer(s) are protected from residues or defects caused by or resulting from exposure to atmospheric conditions. Protection is provided through the formation of an encapsulation layer post etch. In one embodiment, the encapsulation is provided by a thin layer formed in an atomic layer deposition (ALD) process. The thin layer prevents the etched layer(s) from exposure to air. This encapsulation process may take place after the etch process thus allowing for substrates to be subsequently exposed to atmospheric conditions with little or no queue time constraints being needed for staging subsequent wet clean processing steps. In one embodiment, the encapsulation process may be performed with no vacuum break between the etch process and the encapsulation process. In one embodiment, the encapsulation film is compatible with subsequent wet process steps and can be removed during this wet process steps without adverse effects.

Abstract: Embodiments are disclosed for a method to process microelectronic workpieces including forming a metal hard mask layer including ruthenium (Ru MHM layer) over one or more underlying layers on a substrate for a microelectronic workpiece, etching the Ru MHM layer to provide a patterned Ru MHM layer, and etching the one or more underlying layers using the patterned Ru MHM layer as a mask to protect portion of the one or more underlying layers. For one embodiment, the Ru MHM layer is a material including 95 percent or more of ruthenium (Ru). For another embodiment, the Ru MHM layer is a material including 70 percent or more of ruthenium (Ru). Further, the Ru MHM layer preferably has a selectivity of 10 or greater with respect to a next underlying layer adjacent to the Ru MHM layer, such as a SiN hard mask layer.

Abstract: Embodiments are disclosed for processing microelectronic workpieces having patterned structures to improve mandrel pull from spacers for multi-color patterning. The disclosed embodiments form patterned structures on a substrate including mandrels, form spacers adjacent the mandrels that are recessed such that a height of the spacers is less than the height of the mandrels, form protective caps over the spacers while exposing top surfaces of the mandrels, and remove the mandrels to leave a spacer pattern with cap protection. The remaining spacer pattern can then be transferred to underlying layers in additional process steps. The recessing of the spacers and formation of the protective caps tends to reduce or eliminate spacer damage suffered by prior solutions during mandrel pull from spacers for multi-color patterning.