Patents by Inventor Andrew N Sawle
Andrew N Sawle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9159703Abstract: In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage attached to the die side of the control conductive carrier, and a driver integrated circuit (IC) for driving the control FET. The driver IC is situated above the control FET and is electrically coupled to the control FET by at least one conductive buildup layer formed over the control conductive carrier.Type: GrantFiled: September 10, 2013Date of Patent: October 13, 2015Assignee: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Publication number: 20150279821Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.Type: ApplicationFiled: May 27, 2015Publication date: October 1, 2015Inventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Patent number: 9111921Abstract: In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.Type: GrantFiled: September 10, 2013Date of Patent: August 18, 2015Assignee: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Patent number: 9048230Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.Type: GrantFiled: March 21, 2014Date of Patent: June 2, 2015Assignee: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Patent number: 8860194Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.Type: GrantFiled: November 1, 2012Date of Patent: October 14, 2014Assignee: International Rectifier CorporationInventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
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Publication number: 20140203419Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.Type: ApplicationFiled: March 21, 2014Publication date: July 24, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20140191337Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source.Type: ApplicationFiled: March 13, 2014Publication date: July 10, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20140118032Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.Type: ApplicationFiled: November 1, 2012Publication date: May 1, 2014Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
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Publication number: 20140110796Abstract: In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.Type: ApplicationFiled: September 10, 2013Publication date: April 24, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Publication number: 20140110776Abstract: In one implementation, a semiconductor package including conductive carrier coupled power switches includes a first vertical FET in a first active die having a first source and a first gate on a source side of the first active die and a first drain on a drain side of the first active die. The semiconductor package also includes a second vertical FET in a second active die having a second source and a second gate on a source side of the second active die and a second drain on a drain side of the second active die. The semiconductor package includes a conductive carrier attached to the source side of the first active die and to the drain side of the second active die, the conductive carrier coupling the first source to the second drain.Type: ApplicationFiled: September 9, 2013Publication date: April 24, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Publication number: 20140110788Abstract: In one implementation, a semiconductor package includes a top-drain vertical FET in a first active die, a source of the top-drain vertical FET situated on a source side of the first active die and a drain and a gate of the top-drain vertical FET situated on a drain side of the first active die. The semiconductor package also includes a bottom-drain vertical FET in a second active die, a source and a gate of the bottom-drain vertical FET situated on a source side of the second active die and a drain of the bottom-drain vertical FET situated on a drain side of the second active die. The semiconductor package includes a conductive carrier attached to the source side of the first active die and to the drain side of the second active die, the conductive carrier coupling the source of the top-drain vertical FET to the drain of the bottom-drain vertical FET.Type: ApplicationFiled: September 9, 2013Publication date: April 24, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Publication number: 20140110863Abstract: In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage attached to the die side of the control conductive carrier, and a driver integrated circuit (IC) for driving the control FET. The driver IC is situated above the control FET and is electrically coupled to the control FET by at least one conductive buildup layer formed over the control conductive carrier.Type: ApplicationFiled: September 10, 2013Publication date: April 24, 2014Applicant: International Rectifier CorporationInventors: Eung San Cho, Andrew N. Sawle, Mark Pavier, Daniel Cutler
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Patent number: 8680627Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.Type: GrantFiled: October 21, 2011Date of Patent: March 25, 2014Assignee: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Patent number: 8674497Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source.Type: GrantFiled: October 21, 2011Date of Patent: March 18, 2014Assignee: International Business Machines CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20130228794Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package further includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of a common conductive leadframe with the common conductive leadframe electrically and mechanically coupling the control source with the sync drain. The common conductive leadframe thereby serves as the output terminal.Type: ApplicationFiled: April 19, 2013Publication date: September 5, 2013Applicant: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Patent number: 8466546Abstract: A semiconductor package including a conductive clip preferably in the shape of a can, a semiconductor die, and a conductive stack interposed between the die and the interior of the can which includes a conductive platform and a conductive adhesive body.Type: GrantFiled: April 21, 2006Date of Patent: June 18, 2013Assignee: International Rectifier CorporationInventors: Andy Farlow, Mark Pavier, Andrew N. Sawle, George Pearson, Martin Standing
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Patent number: 8426952Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package further includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of a common conductive leadframe with the common conductive leadframe electrically and mechanically coupling the control source with the sync drain. The common conductive leadframe thereby serves as the output terminal.Type: GrantFiled: October 21, 2011Date of Patent: April 23, 2013Assignee: International Rectifier CorporationInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20120181624Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to a common conductive clip, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the common conductive clip, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of the common conductive clip with the common conductive clip electrically and mechanically coupling the control source with the sync drain, where the common conductive clip has a conductive leg for providing electrical and mechanical connection to an output terminal leadframe.Type: ApplicationFiled: October 21, 2011Publication date: July 19, 2012Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20120181681Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source.Type: ApplicationFiled: October 21, 2011Publication date: July 19, 2012Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle
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Publication number: 20120181674Abstract: According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package further includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. The control and sync transistors are stacked on opposite sides of a common conductive leadframe with the common conductive leadframe electrically and mechanically coupling the control source with the sync drain. The common conductive leadframe thereby serves as the output terminal.Type: ApplicationFiled: October 21, 2011Publication date: July 19, 2012Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Eung San Cho, Chuan Cheah, Andrew N. Sawle