Abstract: Mobile management method, system and client. Method includes receiving a DNS query for a host name from an application on client; retrieving reputation data associated with host name from a local cache on client; and determining a policy based on host name and the reputation data. Based on determined policy for the host name, blocking attempted network flows to a host corresponding to host name to produce blocked attempted network flows. Method also includes sending attempted network flow metadata related to the blocked attempted network flows to a collector on client; transmitting the attempted network flow metadata from the collector to a VPN server pool via a VPN tunnel; and producing an anomaly report from the transmitted attempted network flow metadata. The anomaly report includes at least one of anomalies, cohorts, trends, location boundaries, detected network security issues, detected compromised clients and/or optimized network usage.

Abstract: Disclosed embodiments include vacuum electronic devices, methods of operating a vacuum electronic device, and methods of fabricating a vacuum electronic device. In a non-limiting embodiment, a vacuum electronics device includes a cathode and an anode. At least one focus grid is disposed between the cathode and the anode, and the at least one focus grid is physically disconnected from the cathode. The at least one acceleration grid is disposed between the cathode and the anode, and the at least one acceleration grid is further disposed adjacent the at least one focus grid. The at least one acceleration grid is physically disconnected from the cathode.

Abstract: Various disclosed embodiments include thermionic energy converters and electronic circuitry for generating pulses for igniting plasma in a hermetic package of a thermionic energy converter. In various embodiments, an illustrative thermionic energy converter includes a hermetic package charged with a non-cesium gas additive. The hermetic package is configured to route into the hermetic package pulses for igniting plasma in the hermetic package. A cesium reservoir is disposed in the hermetic package. A cathode is disposed in the hermetic package and an anode is disposed in the hermetic package.

Abstract: Disclosed embodiments include vacuum electronic devices and methods of fabricating a vacuum electronic device. In a non-limiting embodiment, a vacuum electronic device includes an electrode that defines discrete support structures therein. A first film layer is disposed on the electrode about a periphery of the electrode and on the support structures. A second film layer is disposed on the first film layer. The second film layer includes electrically conductive grid lines patterned therein that are supported by and suspended between the support structures.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a first film layer disposed on the electrode about a periphery of the electrode; and a second film layer disposed on the first film layer, the second film layer including a plurality of electrically conductive grid lines patterned therein that are supported only at the periphery of the electrode by the first film layer.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.

Abstract: Disclosed embodiments include vacuum electronic devices and methods of fabricating a vacuum electronic device. In a non-limiting embodiment, a vacuum electronic device includes an electrode that defines discrete support structures therein. A first film layer is disposed on the electrode about a periphery of the electrode and on the support structures. A second film layer is disposed on the first film layer. The second film layer includes electrically conductive grid lines patterned therein that are supported by and suspended between the support structures.

Abstract: Disclosed embodiments include vacuum electronic devices, methods of operating a vacuum electronic device, and methods of fabricating a vacuum electronic device. In a non-limiting embodiment, a vacuum electronics device includes a cathode and an anode. At least one focus grid is disposed between the cathode and the anode, and the at least one focus grid is physically disconnected from the cathode. The at least one acceleration grid is disposed between the cathode and the anode, and the at least one acceleration grid is further disposed adjacent the at least one focus grid. The at least one acceleration grid is physically disconnected from the cathode.

Abstract: The present disclosure relates to methods of fabricating electronic devices or components thereof. The electronic devices can be vacuum electronic devices. The methods can include disposing a first material on or in a substrate. The methods can further include removing a portion of the first material to form one or more structure protruding from the substrate. The methods can further include disposing a second material onto the one or more structure of the first material, and then removing a portion of the second material to form one or more sidewall structures. A second portion of the one or more structures of the first material can also be removed to form a fabricated structure including the substrate and one or more sidewall structures protruding therefrom.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a first film layer disposed on the electrode about a periphery of the electrode; and a second film layer disposed on the first film layer, the second film layer including a plurality of electrically conductive grid lines patterned therein that are supported only at the periphery of the electrode by the first film layer.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a first film layer disposed on the electrode about a periphery of the electrode; and a second film layer disposed on the first film layer, the second film layer including a plurality of electrically conductive grid lines patterned therein that are supported only at the periphery of the electrode by the first film layer.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. An address for at least a first page associated with a virtual I/O request is mapped to an entry in a virtual translation control entry (TCE) table. A plurality of physical adapters required to service the virtual I/O request are identified. Upon determining, in each of the identified physical adapters, that an entry in the respective physical TCE table corresponding to the physical adapter is available, for each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in the respective physical TCE table corresponding to the physical adapter, and a physical I/O request corresponding to each physical TCE table entry is issued to the respective physical adapter.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a plurality of grid supports disposed on the electrode, each of the plurality of grid supports having a first width; and a plurality of grid lines, each of the plurality of grid lines being supported on an associated one of the plurality of grid supports, each of the plurality of grid lines having a second width that is wider than the first width.

Abstract: Disclosed embodiments include vacuum electronics devices and methods of fabricating a vacuum electronics device. In a non-limiting embodiment, a vacuum electronics device includes: an electrode; a first film layer disposed on the electrode about a periphery of the electrode; and a second film layer disposed on the first film layer, the second film layer including a plurality of electrically conductive grid lines patterned therein that are supported only at the periphery of the electrode by the first film layer.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. An address for at least a first page associated with a virtual I/O request is mapped to an entry in a virtual translation control entry (TCE) table. A plurality of physical adapters required to service the virtual I/O request are identified. Upon determining, in each of the identified physical adapters, that an entry in the respective physical TCE table corresponding to the physical adapter is available, for each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in the respective physical TCE table corresponding to the physical adapter, and a physical I/O request corresponding to each physical TCE table entry is issued to the respective physical adapter.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. An address for at least a first page associated with a virtual I/O request is mapped to an entry in a virtual translation control entry (TCE) table. A plurality of physical adapters required to service the virtual I/O request are identified. Upon determining, in each of the identified physical adapters, that an entry in the respective physical TCE table corresponding to the physical adapter is available, for each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in the respective physical TCE table corresponding to the physical adapter, and a physical I/O request corresponding to each physical TCE table entry is issued to the respective physical adapter.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. An address for at least a first page associated with a virtual I/O request is mapped to an entry in a virtual translation control entry (TCE) table. A plurality of physical adapters required to service the virtual I/O request are identified. Upon determining, in each of the identified physical adapters, that an entry in the respective physical TCE table corresponding to the physical adapter is available, for each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in the respective physical TCE table corresponding to the physical adapter, and a physical I/O request corresponding to each physical TCE table entry is issued to the respective physical adapter.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. One method for performing an input/output (I/O) request includes mapping an address for at least a first page associated with a virtual I/O request to an entry in a virtual TCE table and identifying a plurality of physical adapters required to service the virtual I/O request. For each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in a physical TCE table corresponding to the physical adapter. This method may also include, in parallel, issuing physical I/O requests to the physical adapters.