Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. One method for performing an input/output (I/O) request includes mapping an address for at least a first page associated with a virtual I/O request to an entry in a virtual TCE table and identifying a plurality of physical adapters required to service the virtual I/O request. For each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in a physical TCE table corresponding to the physical adapter. This method may also include, in parallel, issuing physical I/O requests to the physical adapters.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: The present disclosure relates to methods of fabricating electronic devices or components thereof. The electronic devices can be vacuum electronic devices. The methods can include disposing a first material on or in a substrate. The methods can further include removing a portion of the first material to form one or more structure protruding from the substrate. The methods can further include disposing a second material onto the one or more structure of the first material, and then removing a portion of the second material to form one or more sidewall structures. A second portion of the one or more structures of the first material can also be removed to form a fabricated structure including the substrate and one or more sidewall structures protruding therefrom.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: A method and apparatus are provided for implementing modal selection of a bimodal coherent accelerator in a computer system. Implementing modal selection of a bimodal coherent accelerator using a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to enable and control a coherent coprocessor adapter over PCIE. A CAPI-capable PCIE adapter is enabled to be bimodal and operate in conventional PCI-Express (PCIE) transaction modes or CAPI modes that utilize CAIA coherence and programming interface capabilities.

Abstract: A vendor-independent resource configuration interface automatically maps virtual functions to physical functions in a self-virtualizing IO resource using the concept of a logical port that maps to a particular physical port and protocol in the self-virtualizing IO resource. A user wishing to provide a logical partition access to a self-virtualizing IO resource typically creates or configures a logical port for the logical partition by mapping the logical port to a particular physical port and protocol defined for the self-virtualizing IO resource, and an appropriate virtual function mapped to an appropriate physical function on an appropriate self-virtualizing IO resource is automatically selected, typically without requiring the user to have a detailed understanding of the numbers of supported virtual functions, physical functions and protocols supported by specific resources.

Abstract: In an embodiment, an average busy-to-success ratio is calculated for partitions that submitted operations to a shared resource during a first time period. A first busy-to-success ratio for a first partition during the first time period is calculated. If the first busy-to-success ratio is greater than the average busy-to-success ratio and a difference between the first busy-to-success ratio and the average busy-to-success ratio is greater than a threshold amount, a throttle amount for the first partition is increased. A first operation from the first partition during a first time subdivision of a second time period is received. If a number of operations received from the first partition during the first time subdivision of the second time period is greater than the throttle amount for the first partition, a busy indication is returned to the first partition and the first operation is not submitted to the shared resource.

Abstract: A firmware update process for a self-virtualizing IO resource such as an SRIOV adapter is incorporated into a platform firmware update process to systematically update the resource firmware in a manner that is for the most part transparent to the logical partitions sharing the adapter. In particular, resource firmware associated with a self-virtualizing IO resource is bundled with firmware for at least one adjunct partition associated with that self-virtualizing IO resource within a common firmware image so that, upon restart of the adjunct partition to use the updated firmware image, the resource firmware is also updated, with a logical partition that uses the self-virtualizing IO resource maintained in an active state during the restart, and without requiring the self-virtualizing IO resource to be deconfigured from the logical partition.

Abstract: In an embodiment, an average busy-to-success ratio is calculated for partitions that submitted operations to a shared resource during a first time period. A first busy-to-success ratio for a first partition during the first time period is calculated. If the first busy-to-success ratio is greater than the average busy-to-success ratio and a difference between the first busy-to-success ratio and the average busy-to-success ratio is greater than a threshold amount, a throttle amount for the first partition is increased. A first operation from the first partition during a first time subdivision of a second time period is received. If a number of operations received from the first partition during the first time subdivision of the second time period is greater than the throttle amount for the first partition, a busy indication is returned to the first partition and the first operation is not submitted to the shared resource.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. One method for performing an input/output (I/O) request includes mapping an address for at least a first page associated with a virtual I/O request to an entry in a virtual TCE table and identifying a plurality of physical adapters required to service the virtual I/O request. For each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in a physical TCE table corresponding to the physical adapter. This method may also include, in parallel, issuing physical I/O requests to the physical adapters.

Abstract: Techniques are disclosed for performing input/output (I/O) requests to two or more physical adapters in parallel. One method for performing an input/output (I/O) request includes mapping an address for at least a first page associated with a virtual I/O request to an entry in a virtual TCE table and identifying a plurality of physical adapters required to service the virtual I/O request. For each of the identified physical adapters, the entry in the virtual TCE table is mapped to an entry in a physical TCE table corresponding to the physical adapter. This method may also include, in parallel, issuing physical I/O requests to the physical adapters.

Abstract: Hardware transmit and/or receive queues in a self-virtualizing IO resource are virtualized to effectively abstract away resource-specific details for the self-virtualizing IO resource. By doing so, a logical partition may be permitted to configure and access a desired number of virtual transmit and/or receive queues, and have an adjunct partition that interfaces the logical partition with the self-virtualizing IO resource handle the appropriate mappings between the hardware and virtual queues.

Abstract: A vendor independent interface is provided between a hypervisor and an adjunct partition associated with a self-virtualizing IO resource to effectively abstract away vendor-specific interface details for the self-virtualizing IO resource and its adjunct partition. By doing so, vendor-specific implementation details may be isolated from the configuration and management functionality in a hypervisor, thus minimizing the changes to vendor specific firmware in order to manage new or revised self-virtualizing IO resources.

Abstract: In an embodiment, an average busy-to-success ratio is calculated for partitions that submitted operations to a shared resource during a first time period. A first busy-to-success ratio for a first partition during the first time period is calculated. If the first busy-to-success ratio is greater than the average busy-to-success ratio and a difference between the first busy-to-success ratio and the average busy-to-success ratio is greater than a threshold amount, a throttle amount for the first partition is increased. A first operation from the first partition during a first time subdivision of a second time period is received. If a number of operations received from the first partition during the first time subdivision of the second time period is greater than the throttle amount for the first partition, a busy indication is returned to the first partition and the first operation is not submitted to the shared resource.

Abstract: In an embodiment, an average busy-to-success ratio is calculated for partitions that submitted operations to a shared resource during a first time period. A first busy-to-success ratio for a first partition during the first time period is calculated. If the first busy-to-success ratio is greater than the average busy-to-success ratio and a difference between the first busy-to-success ratio and the average busy-to-success ratio is greater than a threshold amount, a throttle amount for the first partition is increased. A first operation from the first partition during a first time subdivision of a second time period is received. If a number of operations received from the first partition during the first time subdivision of the second time period is greater than the throttle amount for the first partition, a busy indication is returned to the first partition and the first operation is not submitted to the shared resource.

Abstract: Error handling is simplified for a self-virtualizing IO resource that utilizes a physical function adjunct partition for a physical function in the self-virtualizing IO resource to coordinate error recovery for the self-virtualizing IO resource, by restarting each virtual function adjunct partition associated with that physical function to avoid the need to coordinate error recovery within the logical partitions to which such virtual function adjunct partitions are assigned.

Abstract: Hypervisor managed memory paging is provided in a data processing system having multiple logical partitions. The data processing system includes a shared memory pool defined within physical memory. The shared memory pool includes a volume of physical memory with dynamically adjustable sub-volumes or sets of physical pages associated with the multiple logical partitions. Each sub-volume or set is associated with a particular logical partition and includes mapped logical memory pages for that logical partition. A hypervisor memory manager interfaces the multiple logical partitions and the shared memory pool, and manages access to logical memory pages within the shared memory pool. The hypervisor memory manager further manages page-out and page-in of logical memory pages from the shared memory pool to one or more external paging devices. This page-out and page-in managing by the hypervisor memory manager is transparent to the multiple logical partitions.

Abstract: A vendor independent partition interface between a logical partition and an adjunct partition associated with a self-virtualizing IO resource is used to effectively abstract away vender-specific interface details for the self-virtualizing IO resource. By doing so, vender-specific implementation details may be isolated from the operating systems resident in logical partitions, thus requiring only changes in vendor specific firmware in order to support new or revised self-virtualizing IO resources.

Abstract: Multiple translation control entries (TCEs) at the same indices in multiple, same size TCE tables are mapped to facilitate data communication between a self-virtualizing input/output (IO) resource and a logical partition. First and second TCE tables used by an adjunct partition that interfaces a self-virtualizing IO resource with a logical partition may be identically sized, so that whenever a direct memory access (DMA) operation between the self-virtualizing IO resource and the logical partition is desired the same TCE entries in the first and second TCE tables may be used to perform a redirected DMA operation, and without the need to perform hashing or other mapping algorithms to map to the respective TCE entries in the respective TCE tables.