Abstract: An optical optical waveguide channel is formed in an intermediate layer of a printed circuit board (PCB) so that opto-electronic components on integrated circuit (IC) chips mounted on the PCB may be optically interconnected. At each end of the optical waveguide channel is an optical waveguide path perpendicularly extending from the end of the channel to a surface of the printed circuit board. An IC chip mounted on the PCB may include a die flip-mounted on a substrate. An optically transducing surface of the opto-electronic component is directed downward toward the substrate. Optical waveguide paths extend perpendicularly through the substrate, coupling with the optically transducing surfaces. The IC chips are mounted on the PCB, aligning the optical waveguide paths in the substrates with the optical waveguide paths in the PCB.

Abstract: The present invention is a method and apparatus to self update a firmware device. A communication interface receives programming information. A parser coupled to the communication interface to parse the programming information into control commands and program data.

Abstract: The present invention is a method and apparatus to self update a firmware device. A communication interface receives programming information. A parser coupled to the communication interface to parse the programming information into control commands and program data.

Abstract: An optical optical waveguide channel is formed in an intermediate layer of a printed circuit board (PCB) so that opto-electronic components on integrated circuit (IC) chips mounted on the PCB may be optically interconnected. At each end of the optical waveguide channel is an optical waveguide path perpendicularly extending from the end of the channel to a surface of the printed circuit board. An IC chip mounted on the PCB may include a die flip-mounted on a substrate. An optically transducing surface of the opto-electronic component is directed downward toward the substrate. Optical waveguide paths extend perpendicularly through the substrate, coupling with the optically transducing surfaces. The IC chips are mounted on the PCB, aligning the optical waveguide paths in the substrates with the optical waveguide paths in the PCB.

Abstract: The present invention is a system and method for updating memory. The contents of a first storage location in a plurality of storage locations are first copied to a second storage location in the plurality of storage locations. A signal indicating that a read operation accessing the first storage location is non-operational, is issued. The contents of the first storage location are erased. A signal indicating that a read operation accessing the first storage location is operational, is then issued.

Abstract: A system and method for upgrading a boot block of a firmware program is disclosed. A copy of a replacement boot block is transferred to a firmware device, and then the execution address is changed to point to this new location. The replacement boot block is then copied over the original boot block. Once the copying is complete, the execution address is restored to the original location in the firmware program.

Abstract: A memory controller with an integrated system management memory region is disclosed. The memory controller receives an SMI acknowledge signal from a processor. The processor then delivers a system management memory address to the memory controller. Instead of fetching SMI handler instructions from the address indicated by the processor, the memory controller instead fetches SMI handler instructions from its integrated system management memory region. At the end of the integrated system management memory's SMI handler, the processor is instructed to fetch instructions from the address originally specified by the processor. In this manner, a BIOS SMI routine may be executed after the integrated SMI routine is executed.

Abstract: An input/output (I/O) decode arrangement including an I/O decode map in a form of a memory block and containing, before start of any bus I/O transactions, I/O address decode information useable for I/O address decoding for bus transaction ownership, for at least a portion of, and preferably all, possible I/O addresses in a system. Further included are: an I/O decode map pointer adapted to point to a memory address where said I/O decode map is located; an I/O decode cache adapted to cache said decode information with respect to ones of I/O addresses of which accessing has been previously performed with respect to said I/O decode map; and an I/O snooper/storer adapted to snoop said I/O decode map with any I/O address to retrieve said decode information corresponding to said I/O address, and further adapted to store retrieved said decode information into said I/O decode cache. The I/O decode map can be located within at least one of system management memory (SMM) or basic input/output system (BIOS) memory space.