Abstract: An integrated incremental redundancy symbol mapping diversity system for a communication device. The integrated incremental redundancy symbol mapping diversity system includes a transmitter. The transmitter packetizes a retransmission packet according to a modulation scheme in response to a retransmission request from the receiver. The transmitter includes an output packet processor and an inter-packet selective symbol mapper. The output packet processor determines a transmission iteration of a bit segment of the retransmission packet. The inter-packet selective symbol mapper applies a first symbol map pattern to the bit segment based on the transmission iteration of the bit segment and applies a second symbol map pattern to another bit segment of the retransmission packet based on the transmission iteration of the other bit segment. The first symbol map pattern is different from the second symbol map pattern.

Abstract: A message-passing decoder for low-density parity-check codes (LDPC) is provided using a multi-value threshold scheme which is updated throughout the decoding iterations. In an embodiment the check node processing is implemented using the min-sum principle whereby for each corresponding row of the parity check matrix a first and a second minimum value among bit reliability values is determined. Each row of the decoder comprises one or more associative processing elements controlled by a row control element to determine the two minimum values. Each column comprises one or more associative processing elements, an input processing element, and a column control element to determine hard decision bits. The usage of processing elements to construct a decoder may reduce the gate count and decrease the interconnects used to couple the elements.

Abstract: Described herein are one or more implementations of a high-throughput and memory-efficient “windowed” bidirectional Soft Output Viterbi Algorithm (BI-SOVA) decoder. The described BI-SOVA decoder uses the “window” technique to concurrently decode several different non-overlapping portions of a subject signal in parallel.

Abstract: A method and apparatus are provided for error correction of a communication signal. A multiple fixed threshold scheme for iteratively decoding a received codeword includes making a comparison with a threshold to generate a reconstructed version of the received codeword. The threshold has at least two different values that at used during different iterations. The values of the threshold are fixed having been determined prior to decoding. In an embodiment, the fixed thresholds may be based on values for channel parameters and may be selected by a decoder that receives information regarding the channel parameter from a channel estimation unit monitoring the communication channel. Embodiments include decoding methods and apparatus using a threshold having two of more fixed values during the iterative decoding.

Abstract: A technique to perform fast decoding of a Reed-Solomon code. A first multiplier unit multiplies a matrix Bh with a column vector v using common adders to produce a column vector v1. The vector v represents one of an error locator polynomial, an error evaluator polynomial, and a derivative polynomial for a (n, k) Reed-Solomon code. The matrix Bh is over GF(2) including first h columns of a matrix B. A second multiplier unit multiplies non-unity components of a column vector A with non-zero components of the column vector v1 component-wise in GF(q) to produce a column vector v2, q being equal to n+1. A third multiplier unit multiplies diagonal sub-matrices of a matrix C with corresponding components of the column vector v2 in GF(2) to produce a column vector v3.

Abstract: The present invention provides a vortex generator that in one embodiment includes an apex having a first width; a rear face having a second width being greater than the first width; a first and second sidewall each extending from the first width of the apex to the second width of the rear face, wherein at least a portion of each of the first and second sidewall have a peak including a convex surface; and a concave work surface positioned between the peak of the first and the second sidewall, wherein the concave work surface has an intake at the apex and an outlet at the rear face. In another embodiment, the exterior faces of the sidewalls include a planar surface.