Patents by Inventor Anh Phan

Anh Phan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6063531
    Abstract: A focus monitor structure is placed on a reticle or mask near the production device structures, such as integrated circuits, to monitor the focal conditions of the lithography process as well as other parameters, such as the critical dimension, and proximity effects. The focus monitor structure includes a series of densely packed parallel lines and an isolated line along with a line that is positioned orthogonally to the densely packed lines forming an "L" shaped structure. The focus monitor structure also includes a plurality of rectangular islands that create post structures when patterned in the resist layer. The lines of the focus monitor structure are approximately the critical dimension and the rectangular islands vary in width between .+-.10% of the critical dimension.
    Type: Grant
    Filed: October 6, 1998
    Date of Patent: May 16, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Bharath Rangarajan, Khoi Anh Phan, Carmen L. Morales
  • Patent number: 5997691
    Abstract: A method and apparatus of manufacturing a web which is striped with add-on material, comprising: a first arrangement which establishes a sheet of base web from a first slurry and moves the established sheet along a first path; a second arrangement for preparing a second slurry; a moving orifice applicator operative so as to repetitively discharge the second slurry upon the moving sheet of base web, the moving orifice applicator comprising: a chamber box arranged to establish a reservoir of the second slurry across the first path; an endless belt having an orifice, the endless belt received through the chamber box; a drive arrangement operative upon the endless belt to continuously move the orifice along an endless path and repetitively through the chamber box, the orifice when communicated with the reservoir being operative to discharge the second slurry from the reservoir through the orifice; a flow distribution system for introducing the second slurry into the chamber box at spaced-apart feed locations alon
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: December 7, 1999
    Assignee: Philip Morris Incorporated
    Inventors: Navin Gautam, Harry V. Lanzillotti, Tyrone W. Murray, D. Anh Phan, Jon R. Butt, Sr., H. Edmund Clark, Thomas E. Dougherty, Thomas L. Fillio, Vladimir Hampl, Jr., Phillip L. Ursery, Edwin L. Cutright, Ronald L. Edwards
  • Patent number: 5886909
    Abstract: Defects in integrated circuit wafers (10) are often difficult to diagnose, because patterned wafer inspections can only be done after certain wafer processing steps. Defect simulation is used to understand the relation between defects in the wafer (10) and the resulting wafer profiles. Defects such as particles (50) and bubbles (22) in the photoresist (28), for example, translate into a wide variety of defective profiles. Knowledge of the relation between defects and the defect profiles can assist in yield improvement efforts, since defects may be diagnosed by comparing simulated and observed defect profiles. From the simulated defect profiles, methods can be adapted to fix or correct observed defects.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: March 23, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Linda Milor, Yeng-Kaung Peng, Khoi Anh Phan, David Steele