Abstract: Backside contact structures include etch selective materials to facilitate backside contact formation. An integrated circuit structure includes a frontside contact region, a device region below the frontside contact region, and a backside contact region below the device region. The device region includes a transistor. The backside contact region includes a first dielectric material under a source or drain region of the transistor, a second dielectric material laterally adjacent to the first dielectric material and under a gate structure of the transistor. A non-conductive spacer is between the first and second dielectric materials. The first and second dielectric materials are selectively etchable with respect to one another and the spacer. The backside contact region may include an interconnect feature that, for instance, passes through the first dielectric material and contacts a bottom side of the source/drain region, and/or passes through the second dielectric material and contacts the gate structure.

Abstract: An integrated circuit structure comprises a lower device layer that includes a first structure comprising a first set of transistor fins and a first set of contact metallization. An upper device layer is bonded onto the lower device layer, where the upper device layer includes a second structure comprising a second set of transistor fins and a second set of contact metallization. At least one power isolation wall extends from a top of the upper device layer to the bottom of the lower device layer, wherein the power isolation wall is filled with a conductive material such that power is routed between transistor devices on the upper device layer and the lower device layer.

Abstract: Systems and methods relating to Discovery Signal Measurement Timing Configuration (DMTC) are disclosed. In some embodiments, a method of operating a radio access node in a cellular communications network having a primary cell and a secondary cell, comprises sending, to a wireless device, a DMTC for one of a group consisting of: (a) the secondary cell configured for the wireless device such that the DMTC is a specific DMTC for the secondary cell; and (b) the primary cell and additional cells that are configurable as secondary cells such that the DMTC applies to both the primary cell and the additional cells when configured as secondary cells. Related radio access nodes and wireless devices are also disclosed.

Abstract: Disclosed herein are stacked transistors with dielectric between channel materials, as well as related methods and devices. In some embodiments, an integrated circuit structure may include stacked strata of transistors, wherein a dielectric material is between channel materials of adjacent strata, and the dielectric material is surrounded by a gate dielectric.

Abstract: In some embodiments, a semiconductor device structure is formed by using an angled etch to remove material so as to expose a portion of an adjacent conductor. The space formed upon removing the material can then be filled with a conductive material during formation of a contact or other conductive structure (e.g., and interconnection). In this way, the contact formation also fills the space to form an angled local interconnect portion that connects adjacent structures (e.g., a source/drain contact to an adjacent source/drain contact, a source/drain contact to an adjacent gate contact, a source/drain contact to an adjacent device level conductor also connected to a gate/source/drain contact). In other embodiments, an interconnection structure herein termed a “jogged via” establishes and electrical connection from laterally adjacent peripheral surfaces of conductive structures that are not coaxially or concentrically aligned with one another.

Abstract: An integrated circuit structure includes a first semiconductor fin extending horizontally in a length direction and including a bottom portion and a top portion above the bottom portion, a bottom transistor associated with the bottom portion of the first semiconductor fin, a top transistor above the bottom transistor and associated with the top portion of the first semiconductor fin, and a first vertical diode. The first vertical diode includes: a bottom region associated with at least the bottom portion of the first semiconductor fin, the bottom region including one of n-type and p-type dopant; a top region associated with at least the top portion of the first semiconductor fin, the top region including the other of n-type and p-type dopant; a bottom terminal electrically connected to the bottom region; and a top terminal electrically connected to the top region at the top portion of the first semiconductor fin.

Abstract: Integrated circuits with stacked transistors and methods of manufacturing the same are disclosed. An example integrated circuit includes a first transistor in a first portion of the integrated circuit, and a second transistor stacked above the first transistor and in a second portion of the integrated circuit above the first portion. The integrated circuit further includes a bonding layer between the first and second vertical portions of the integrated circuit. The bonding layer includes an opening extending therethrough between the first and second vertical portions of the integrated circuit. The integrated circuit also includes a gate dielectric on an inner wall of the opening.

Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using a bottom-up oxidation approach, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a substrate. The vertical arrangement of nanowires has one or more active nanowires above one or more oxidized nanowires. A gate stack is over the vertical arrangement of nanowires and around the one or more oxidized nanowires.

Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires. All nanowires of the vertical arrangement of nanowires are oxide nanowires. A gate stack is over the vertical arrangement of nanowires, around each of the oxide nanowires. The gate stack includes a conductive gate electrode.

Abstract: An integrated circuit structure comprises a substrate and a stacked channel of self-aligned heterogeneous materials, wherein the stacked channel of self-aligned heterogeneous materials comprises an NMOS channel material over the substrate; and a PMOS channel material stacked over and self-aligned with the NMOS channel material. A heterogeneous gate stack is in contact the both the NMOS channel material and the PMOS channel material.

Abstract: Embodiments herein describe techniques for a semiconductor device including a first transistor stacked above and self-aligned with a second transistor, where a shadow of the first transistor substantially overlaps with the second transistor. The first transistor includes a first gate electrode, a first channel layer including a first channel material and separated from the first gate electrode by a first gate dielectric layer, and a first source electrode coupled to the first channel layer. The second transistor includes a second gate electrode, a second channel layer including a second channel material and separated from the second gate electrode by a second gate dielectric layer, and a second source electrode coupled to the second channel layer. The second source electrode is self-aligned with the first source electrode, and separated from the first source electrode by an isolation layer. Other embodiments may be described and/or claimed.

Abstract: A network node for wireless access is operating in a cellular network for an unlicensed frequency band and arranged for serving wireless devices in the unlicensed frequency band. The serving of the wireless devices in the unlicensed band relies on making a clear channel assessment in the unlicensed band for ascertaining that the unlicensed band is currently not occupied by other transmissions and when not occupied commencing transmission. Upon commencing the transmission, the network node is arranged to attempt scheduling a paging message together with a message providing a discovery signal and determine whether the transmission of the discovery signal and the paging message use the same subframe scrambling code, and if they do, transmit the paging message and the discovery signal in the same subframe. A method and computer program for the network node are also disclosed.

Abstract: In one aspect, a wireless device monitors radio link quality for a link between the wireless device and a wireless transmitter that is configured to transmit a discovery signal at spaced, periodic, intervals and that is further configured to intermittently transmit subframes carrying user data, such that the wireless device is unable to predict which subframes will carry user data before attempting to detect the subframes. The wireless device collects, for each of the spaced, periodic, intervals, discovery-signal signal quality metrics corresponding to the discovery signal. The wireless device also collects, for each detected subframe carrying user data, detected-subframe signal quality metrics corresponding to the detected subframe.

Abstract: Embodiments herein describe techniques for a semiconductor device over a semiconductor substrate. A first bonding layer is above the semiconductor substrate. One or more nanowires are formed above the first bonding layer to be a channel layer. A gate electrode is around a nanowire, where the gate electrode is in contact with the first bonding layer and separated from the nanowire by a gate dielectric layer. A source electrode or a drain electrode is in contact with the nanowire, above a bonding area of a second bonding layer, and separated from the gate electrode by a spacer, where the second bonding layer is above and in direct contact with the first bonding layer. Other embodiments may be described and/or claimed.

Abstract: A method performed by a wireless communication device for reducing handover delay, wherein the wireless communication device is arranged to operate in a cellular communication system and to operate in a cell using unlicensed spectrum. The method includes receiving a downlink, DL, signal from network node operating a neighbouring cell operating in the unlicensed spectrum, wherein the DL signal includes a discovery reference signal, DRS, subframe, storing data associated with the DRS subframe, receiving a handover command from a network node operating a serving cell where the neighbouring cell is a target cell, and performing a random access procedure for handover to the target cell. A device performing the method and a computer program for implementing the method are also disclosed.

Abstract: There is provided a method, in a wireless device, for communicating with a network node using autonomous Uplink (UL) access. The method comprises: after sending a data transmission to a network node, starting a retransmission window associated with a feedback process of the data transmission, the retransmission window including a first timer; and in response to detecting an absence of a feedback signal during a time period given by the first timer, retransmitting the data after expiry of the first timer.

Abstract: Stacked transistor structures including one or more thin film transistor (TFT) material nanowire or nanoribbon channel regions and methods of forming same are disclosed. In an embodiment, a second transistor structure has a TFT material nanowire or nanoribbon stacked on a first transistor structure which also includes nanowires or nanoribbons comprising TFT material or group IV semiconductor. The top and bottom channel regions may be configured the same or differently, with respect to shape and/or semiconductor materials. Top and bottom transistor structures (e.g., NMOS/PMOS) may be formed using the top and bottom channel region structures. An insulator region may be interposed between the upper and lower channel regions.

Abstract: A nanowire transistor structure has a first device region with a first body of semiconductor material having a first cross-sectional shape. A second device region has a second body with a second cross-sectional shape different from the first cross-sectional shape. The first device section is vertically above or below the second device section with the bodies extending horizontally between a source and drain. A first gate structure is wrapped around the first body and a second gate structure is wrapped around the second body. Differences in the geometries of the nanowires can be used to optimize performance in the first device section independently of the second device section.

Abstract: Embodiments include transistor devices and a method of forming the transistor devices. A transistor device includes a first dielectric over a substrate, and vias on a first metal layer, where the first metal layer is on an etch stop layer that is on the first dielectric. The transistor device also includes a second dielectric over the first metal layer, vias, and etch stop layer, where the vias include sidewalls, top surfaces, and bottom surfaces, and stacked transistors on the second dielectric and the top surfaces of the vias, where the sidewalls and top surfaces of the vias are positioned within a footprint of the stacked transistors. The stacked transistors include gate electrodes and first and second transistor layers. The first metal layer includes conductive materials including tungsten or cobalt. The footprint may include a bottom surface of the first transistor layer and a bottom surface of the gate electrodes.

Abstract: The present disclosure relates to methods, nodes and computer program products for controlling radio channel deployment when using un-licensed carriers in a wireless communication network. In particular, the present disclosure relates to method for mobility and/or load balancing target selection when using un-licensed carriers. When performed in an access node, the method for controlling radio channel deployment in the un-licensed spectrum includes determining unlicensed carrier intrinsic cell channel load in a cell served by the access node based on one or more predetermined channel load indicators and obtaining neighbor cell channel load information, from one or more neighboring access nodes. The neighbor cell channel load information includes unlicensed carrier channel load in respective cells based on the one or more predetermined channel load indicators.