Patents by Inventor Ani Xavier

Ani Xavier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PATTERN BASED ESTIMATION OF ERRORS IN ADC
    Publication number: 20180191362
    Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Application
    Filed: March 1, 2018
    Publication date: July 5, 2018
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis
  • Pattern based estimation of errors in ADC
    Patent number: 9941893
    Abstract: An ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 10, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis
  • PATTERN BASED ESTIMATION OF ERRORS IN ADC
    Publication number: 20170302287
    Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 19, 2017
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis