Abstract: Etch rate distributions are captured at a succession of hardware tilt angles of the RF source power applicator relative to the workpiece and their non-uniformities computed, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two plasma reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.

Abstract: Examples of the disclosure generally relate to a component for use in a semiconductor process chamber includes a body having machined surfaces including a first surface and a second surface. The first surface is configured to interface with a support member of the semiconductor process chamber. The second surface is configured to face a processing region of the semiconductor process chamber. A treated area of the second surface includes relatively flatter peaks than an untreated area of the machined surfaces and exhibits an average roughness between 1 and 30 micro-inches.

Abstract: Etch rate distribution non-uniformities are predicted for a succession of hardware tilt angles of the RF source applicator relative to the workpiece, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.

Abstract: Etch rate distribution non-uniformities are predicted for a succession of hardware tilt angles of the RF source applicator relative to the workpiece, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.

Abstract: Etch rate distributions are captured at a succession of hardware tilt angles of the RF source power applicator relative to the workpiece and their non-uniformities computed, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two plasma reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.

Abstract: Embodiments of the present invention provide methods to etching a recess channel in a semiconductor substrate, for example, a silicon containing material. In one embodiment, a method of forming a recess structure in a semiconductor substrate includes transferring a silicon substrate into a processing chamber having a patterned photoresist layer disposed thereon exposing a portion of the substrate, providing an etching gas mixture including a halogen containing gas and a Cl2 gas into the processing chamber, supplying a RF source power to form a plasma from the etching gas mixture, supplying a pulsed RF bias power in the etching gas mixture, and etching the portion of the silicon substrate exposed through the patterned photoresist layer in the presence of the plasma.

Abstract: In some embodiments, methods for forming a three dimensional NAND structure include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon consisting layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating layers; providing a process gas comprising sulfur hexafluoride and oxygen to the process chamber; providing RF power of about 4 kW to about 6 kW to a first inductive RF coil and a second inductive RF coil disposed proximate the process chamber to ignite the process gas to form a plasma, wherein a current flowing through the first inductive RF coil is out of phase with RF current flowing through the second inductive RF coil; and etching through a desired number of the alternating layers to form a feature.

Abstract: Embodiments of the present invention provide methods to etching a recess channel in a semiconductor substrate, for example, a silicon containing material. In one embodiment, a method of forming a recess structure in a semiconductor substrate includes transferring a silicon substrate into a processing chamber having a patterned photoresist layer disposed thereon exposing a portion of the substrate, providing an etching gas mixture including a halogen containing gas and a Cl2 gas into the processing chamber, supplying a RF source power to form a plasma from the etching gas mixture, supplying a pulsed RF bias power in the etching gas mixture, and etching the portion of the silicon substrate exposed through the patterned photoresist layer in the presence of the plasma.

Abstract: In some embodiments, methods for forming a three dimensional NAND structure include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon consisting layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating layers; providing a process gas comprising sulfur hexafluoride and oxygen to the process chamber; providing RF power of about 4 kW to about 6 kW to a first inductive RF coil and a second inductive RF coil disposed proximate the process chamber to ignite the process gas to form a plasma, wherein a current flowing through the first inductive RF coil is out of phase with RF current flowing through the second inductive RF coil; and etching through a desired number of the alternating layers to form a feature.

Abstract: Embodiments of the present disclosure generally provide apparatus and method for improving processing uniformity by reducing external magnetic noises. One embodiment of the present disclosure provides an apparatus for processing semiconductor substrates. The apparatus includes a chamber body defining a vacuum volume for processing one or more substrate therein, and a shield assembly for shielding magnetic flux from the chamber body disposed outside the chamber body, wherein the shield assembly comprises a bottom plate disposed between the chamber body and the ground to shield magnetic flux from the earth.

Abstract: A method and apparatus for plasma etching a workpiece, such as a semiconductor wafer, including a thin film stack having a top film disposed over a bottom film with an intervening middle film there between. Etch selectivity between the top and bottom films may be as low as between 1:1 and 2:1 and a first carbon-lean gas chemistry is used to etch through the top film, a second carbon-lean gas chemistry is used to etch through the middle film, and the bottom film is etched through by alternating between depositing a polymer passivation on the top film using a carbon-rich gas chemistry and an etching of the bottom film with a third carbon-lean gas chemistry, which may be the same as the first carbon-lean gas chemistry.

Abstract: Apparatus for controlling the temperature of a substrate support may include a first heat transfer loop and a second heat transfer loop. The first heat transfer loop may have a first bath with a first heat transfer fluid at a first temperature. The second heat transfer loop may have a second bath with a second heat transfer fluid at a second temperature. The first and second temperatures may be the same or different. First and second flow controllers may be provided for respectively providing the first and second heat transfer fluids to a substrate support. One or more return lines may couple one or more outlets of the substrate support to the first and second baths for returning the first and second heat transfer fluids to the first and second baths.

Abstract: Methods for etching substrates using a pulsed DC voltage are provided herein. In some embodiments, a method for method for etching a substrate disposed on a substrate support within a process chamber may include providing a process gas to the process chamber; forming a plasma from the process gas; applying a pulsed DC voltage to a first electrode disposed within the process chamber; and etching the substrate while applying the pulsed DC voltage.

Abstract: A method and apparatus for plasma etching a workpiece, such as a semiconductor wafer, including a thin film stack having a top film disposed over a bottom film with an intervening middle film there between. Etch selectivity between the top and bottom films may be as low as between 1:1 and 2:1 and a first carbon-lean gas chemistry is used to etch through the top film, a second carbon-lean gas chemistry is used to etch through the middle film, and the bottom film is etched through by alternating between depositing a polymer passivation on the top film using a carbon-rich gas chemistry and an etching of the bottom film with a third carbon-lean gas chemistry, which may be the same as the first carbon-lean gas chemistry.

Abstract: Methods and apparatus for controlling the temperature of a substrate support are provided herein. In some embodiments, an apparatus for controlling the temperature of a substrate support may include a first heat transfer loop and a second heat transfer loop. The first heat transfer loop may have a first bath with a first heat transfer fluid at a first temperature. The second heat transfer loop may have a second bath with a second heat transfer fluid at a second temperature. The first and second temperatures may be the same or different. First and second flow controllers may be provided for respectively providing the first and second heat transfer fluids to a substrate support. One or more return lines may couple one or more outlets of the substrate support to the first and second baths for returning the first and second heat transfer fluids to the first and second baths.

Abstract: An etch method includes etching a masked substrate to form a recess with a first sidewall in the substrate. A thin surface layer of the substrate on the first sidewall is then converted into a passivation layer. The masked substrate is etched again to deepen the recess in the substrate. A surface layer of the substrate on the second sidewall of the recess is then converted into a passivation layer. In one embodiment, upon removal of the passivation layers from both sidewalls, the first and second sidewalls of the high aspect ratio recess are aligned to within 10 ? of each other to provide a high aspect ratio recess having a vertical profile.

Abstract: Micro devices are formed in situ in a high density in a substrate comprising a masked silicon layer over a stop layer of a silicon compound, by anisotropically etching the desired feature in the silicon layer, overetching to form a notch at the silicon-stop layer interface, depositing a protective fluorocarbon polymer layer on the sidewalls and bottom of the etched silicon layer, and isotropically etching to separate the etched feature from the stop layer. This method avoids the problems of stiction common in other methods of forming micro devices.

Abstract: A method for operating a plasma reactor to etch high-aspect-ratio features on a workpiece in a vacuum chamber. The method comprises the performance of an etch process followed by a flash process. During the etch process, a first gas is supplied into the vacuum chamber, and a plasma of the first gas is maintained for a first period of time. The plasma of the first gas comprises etchant and passivant species. During the flash process, a second gas comprising a deposit removal gas is supplied into the vacuum chamber, and a plasma of the second gas is maintained for a second period of time. The DC voltage between the workpiece and the plasma of the second gas during the second period of time is significantly less than the DC voltage between the workpiece and the plasma of the first gas during the first period of time.

Abstract: Micro devices are formed in situ in a high density in a substrate comprising a masked silicon layer over a stop layer of a silicon compound, by anisotropically etching the desired feature in the silicon layer, overetching to form a notch at the silicon-stop layer interface, depositing a protective fluorocarbon polymer layer on the sidewalls and bottom of the etched silicon layer, and isotropically etching to separate the etched feature from the stop layer. This method avoids the problems of stiction common in other methods of forming micro devices.

Abstract: Disclosed herein is a method of etching a trench in silicon overlying a dielectric material which reduces or substantially eliminates notching at the base of the trench, while reducing scalloping on the sidewalls of the trench. The method comprises etching a first portion of a trench by exposing a silicon substrate, through a patterned masking layer, to a plasma generated from a fluorine-containing gas. This etching is followed by a polymer deposition step comprising exposing the substrate to a plasma generated from a gas which is capable of forming a polymer on etched silicon surfaces. The etching and polymer deposition steps are repeated for a number of cycles, depending on the desired depth of the first portion of the trench. The final portion of the trench is etched by exposing the silicon to a plasma generated from a combination of a fluorine-containing gas and a polymer-forming gas.