Patents by Inventor Ankit Gupta

Ankit Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220209777
    Abstract: A PLL includes an input comparison circuit comparing a reference signal to a divided feedback signal to thereby control a charge pump that generates a charge pump output signal. A filter receives the charge pump output signal when a switch is closed, and produces an oscillator control signal causing an oscillator to generate an output signal. Divider circuitry divides the output signal by a divisor to produce the divided feedback signal. Divisor generation circuitry changes the divisor over time so the output signal ramps from a start frequency to an end frequency. Modification circuitry stores a first oscillator control signal equal to the value of the oscillator control signal when the frequency of the output signal is the start ramp frequency. When the frequency of the output signal reaches the end ramp frequency, the switch is opened, and the stored first oscillator control signal is applied to the loop filter.
    Type: Application
    Filed: November 8, 2021
    Publication date: June 30, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Gagan MIDHA, Kallol CHATTERJEE, Anand KUMAR, Ankit GUPTA
  • Patent number: 11374580
    Abstract: A PLL includes a phase-frequency-detector-and-charge-pump-circuit (PFDCPC) receiving a reference signal and divided signal, and generating a charge-pump current. A loop-filter is between output of the PFDCPC and a reference-voltage. A first voltage-to-current converter (V2I1) has low gain, and a second voltage-to-current converter (V2I2) has high gain. A low-gain-path is between outputs of the PFDCPC and V2I1, and a high-gain-path is between the outputs of the PFDCPC and V2I2. A current-controlled-oscillator receives an input signal, and generates an output signal. A loop divider divides the output signal by a divider-value, producing the divided signal. The low-gain-path runs directly from the PFDCPC, through the V2I1, to the input of the current-controlled-oscillator. The high-gain-path runs from the PFDCPC to the loop-filter, from a tap of the loop-filter to a low-pass filter through a current mirror, from a tap of the low-pass filter through the V2I2, to the input of the current-controlled-oscillator.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: June 28, 2022
    Assignee: STMicroelectronics International N.V.
    Inventors: Sagnik Mukherjee, Ankit Gupta
  • Publication number: 20220200607
    Abstract: A calibration scheme is used to control PLL bandwidth and contain its spread. In open loop, the VCO control voltage is swept over a range of values and VCO output frequency is measured at each control voltage level. The gain KVCO is determined for each measured output frequency and a corresponding current magnitude for the variable magnitude charge pump is calculated from a ratio of a constant to the gain KVCO and correlated in a look-up table to the measured output frequency. Once calibration is completed, the PLL loop is closed and a calculated current magnitude is fetched from the look-up table based on a desired output frequency for the PLL circuit. The variable magnitude charge pump circuit is then controlled to generate a charge pump current with a magnitude corresponding to the fetched charge pump current magnitude.
    Type: Application
    Filed: November 4, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics International N.V.
    Inventor: Ankit GUPTA
  • Publication number: 20220182063
    Abstract: A PLL circuit includes a fractional-N divider generating a feedback signal, a first phase-frequency detector that compares the feedback signal to a reference signal to generate first up/down control signals that control a charge pump to generate a charge pump output current. A noise cancelation circuit includes a synchronization circuit that generates first and second synchronized feedback signals from the PLL circuit output and the feedback signal, where the first and second synchronized feedback signals are offset by an integer number of cycles of the PLL circuit output. A second phase-frequency detector circuit compares the first and second synchronized feedback clock signals to generate second up/down control signals whose pulse widths differ by the integer number of PLL cycles. A current digital to analog converter circuit is controlled in response to the second up/down control signals to apply noise canceling sourcing and sinking currents to the charge pump output current.
    Type: Application
    Filed: October 21, 2021
    Publication date: June 9, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Ankit GUPTA, Sagnik MUKHERJEE
  • Publication number: 20220179910
    Abstract: A computer-implemented method performed at least in part by a graph database configured to store at least one graph dataset. The method includes receiving a graph query configured to be performed against a machine learning model, and communicating the graph query with a machine learning system that is configured to use the machine learning model to obtain model inference results and communicate those model inference results to the graph database application. The graph database provides query results based at least in part on the model inference results to an entity.
    Type: Application
    Filed: May 6, 2021
    Publication date: June 9, 2022
    Inventors: Karthik Gurumoorthy Subramanya Bharathy, Ankit Gupta, George Karypis, Divyakala Vel, Bradley Bebee, Adesoji Adeshina, Xiang Song
  • Publication number: 20220166435
    Abstract: An integrated circuit includes a pulse width modulator. The pulse width modulator includes a multiplexer that receives a plurality of data delay signals. Each of the data delay signals is based on a data signal and a respective clock phase signal. The multiplexer includes a first multiplexer stage and a second multiplexer stage. The first multiplexer stage receives all of the data delay signals and has a relatively large delay. The second multiplexer stage receives to output signals from the first multiplexer stage and has a relatively small delay. The second multiplexer stage outputs a pulse width modulation signal that can have a pulse width corresponding to the offset between two adjacent clock phase signals.
    Type: Application
    Filed: November 12, 2021
    Publication date: May 26, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Prashutosh GUPTA, Ankit GUPTA
  • Publication number: 20220158690
    Abstract: A system for co-transmitting discrete power and data over a common high frequency channel includes a power transmitting node, a power receiving node, a data transmitting node, a data receiving node, a power transmitting switch, a power receiving switch, a data transmitting switch, a data receiving switch, a primary power switch, a secondary power switch, a common high frequency channel, a first control unit, and a second control unit. When the primary power switch, power transmitting switch, and power receiving switch are in an activated state, a power signal is transmitted over the common high frequency channel from the power transmitting node to the power receiving node. When the secondary power switch, data transmitting switch, and data receiving switch are in an activated state, a data signal is transmitted over the common high frequency channel from the data transmitting node to the data receiving node.
    Type: Application
    Filed: February 7, 2022
    Publication date: May 19, 2022
    Inventors: Sudip K. Mazumder, Ankit Gupta
  • Publication number: 20220155832
    Abstract: A storage system and method for data-driven intelligent thermal throttling are provided. In one embodiment, the storage system comprises a memory and a controller. The controller is configured to determine a temperature of the memory, estimate a future temperature curve based on the temperature of the memory, and determine a memory throttling delay to apply based on the estimated future temperature curve. Other embodiments are provided.
    Type: Application
    Filed: February 17, 2021
    Publication date: May 19, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Narendhiran Chinnaanangur Ravimohan, Ankit Gupta, Sai Revanth Reddy Chappidi
  • Patent number: 11275807
    Abstract: Aspects of the technology enable selective updating of search results and refreshing an entire webpage while minimizing the amount of information transmitted between a client device and a web server. The approach involves determining whether a change in a detected location of the client device would alter the search results or other portions of the webpage. Current and previously received location information is analyzed and compared against a threshold value, which indicates whether there would be a change to location-relevant information. A location signal is provided to the client device based on this analysis, which is used to determine whether to refresh the received search results, to refresh an entire webpage, or to not refresh either the received search results or the entire webpage.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: March 15, 2022
    Assignee: Google LLC
    Inventor: Ankit Gupta
  • Patent number: 11245437
    Abstract: A system for co-transmitting discrete power and data over a common high frequency channel includes a power transmitting node, a power receiving node, a data transmitting node, a data receiving node, a power transmitting switch, a power receiving switch, a data transmitting switch, a data receiving switch, a primary power switch, a secondary power switch, a common high frequency channel, a first control unit, and a second control unit. When the primary power switch, power transmitting switch, and power receiving switch are in an activated state, a power signal is transmitted over the common high frequency channel from the power transmitting node to the power receiving node. When the secondary power switch, data transmitting switch, and data receiving switch are in an activated state, a data signal is transmitted over the common high frequency channel from the data transmitting node to the data receiving node.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: February 8, 2022
    Assignee: UNIVERSITY OF ILLINOIS CHICAGO
    Inventors: Sudip K. Mazumder, Ankit Gupta
  • Publication number: 20220038105
    Abstract: A PLL includes a phase-frequency-detector-and-charge-pump-circuit (PFDCPC) receiving a reference signal and divided signal, and generating a charge-pump current. A loop-filter is between output of the PFDCPC and a reference-voltage. A first voltage-to-current converter (V2I1) has low gain, and a second voltage-to-current converter (V2I2) has high gain. A low-gain-path is between outputs of the PFDCPC and V2I1, and a high-gain-path is between the outputs of the PFDCPC and V2I2. A current-controlled-oscillator receives an input signal, and generates an output signal. A loop divider divides the output signal by a divider-value, producing the divided signal. The low-gain-path runs directly from the PFDCPC, through the V2I1, to the input of the current-controlled-oscillator. The high-gain-path runs from the PFDCPC to the loop-filter, from a tap of the loop-filter to a low-pass filter through a current mirror, from a tap of the low-pass filter through the V2I2, to the input of the current-controlled-oscillator.
    Type: Application
    Filed: July 21, 2021
    Publication date: February 3, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Sagnik MUKHERJEE, Ankit GUPTA
  • Patent number: 11237620
    Abstract: An apparatus is provided which comprises: a first Power Management Unit (PMU); and a second PMU, wherein the first PMU is to manage transition of the apparatus from a low power state to a first active state, wherein the second PMU is to manage transition of the apparatus from the first active state to a second active state, and wherein the second PMU is to be powered down while the apparatus is to be in the low power state.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: February 1, 2022
    Assignee: Intel Corporation
    Inventors: Dileep J. Kurian, Pranjali S. Deshmukh, Sriram Kabisthalam Muthukumar, Ankit Gupta, Tanay Karnik, David Arditti Ilitzky, Saurabh Bhandari
  • Publication number: 20220030386
    Abstract: A user-to-entity communication channel is established for providing increased information regarding entities to the general population. Ambassadors for a entity are identified and selected based on location history of devices for which location reporting is authorized. The ambassadors may provide information regarding the entity to the public through the communication channel. Communications between the users and ambassadors may be reported to the entity owner for analysis by the entity owner.
    Type: Application
    Filed: October 8, 2021
    Publication date: January 27, 2022
    Inventors: Matteo Agosti, Ankit Gupta
  • Publication number: 20210395710
    Abstract: The present invention provides a Cas9 platform to facilitate single-site nuclease gene editing precision within a human genome. For example, a Cas9 nuclease/DNA-targeting unit (Cas9-DTU) fusion protein precisely delivers a Cas9/sgRNA complex to a specific target site within the genome for subsequent sgRNA-dependent cleavage of an adjacent target sequence. Alternatively, attenuating Cas9 binding using mutations to the a protospacer adjacent motif (PAM) recognition domain makes Cas9 target site recognition dependent on the associated DTU, all while retaining Cas9's sgRNA-mediated DNA cleavage fidelity. Cas9-DTU fusion proteins have improved target site binding precision, greater nuclease activity, and a broader sequence targeting range than standard Cas9 systems. Existing Cas9 or sgRNA variants (e.g., truncated sgRNAs (tru-gRNAs), nickases and FokI fusions) are compatible with these improvements to further reduce off-target cleavage.
    Type: Application
    Filed: May 6, 2021
    Publication date: December 23, 2021
    Inventors: Scot A Wolfe, Mehmet Fatih Bolukbasi, Ankit Gupta, Erik J. Sontheimer, Nadia Amrani
  • Publication number: 20210381844
    Abstract: To provide personalized data for display on a map, a server device obtains location data for a user and identifies locations that are familiar to the user based on the frequency and recency in which the user visits the locations. The server device then provides the familiar locations in search results/suggestions and annotates the familiar locations with a description of a relationship between the familiar location and the user. The server device also includes the familiar locations as landmarks for performing maneuvers in a set of navigation instructions. Furthermore, the server device provides a familiar location as a frame of reference on a map display when a user selects another location nearby the familiar location. Moreover, the server device includes a familiar location as an intermediate destination when the user request navigation directions to a final destination.
    Type: Application
    Filed: September 6, 2018
    Publication date: December 9, 2021
    Inventors: Haroon Baig, Ankit Gupta
  • Publication number: 20210364311
    Abstract: To provide personalized data for display on a map, a server device obtains location data for a user and identifies locations that are familiar to the user based on the frequency and recency in which the user visits the locations. The server device then provides the familiar locations in search results/suggestions and annotates the familiar locations with a description of a relationship between the familiar location and the user. The server device also includes the familiar locations as landmarks for performing maneuvers in a set of navigation instructions. Furthermore, the server device provides a familiar location as a frame of reference on a map display when a user selects another location nearby the familiar location. Moreover, the server device includes a familiar location as an intermediate destination when the user request navigation directions to a final destination.
    Type: Application
    Filed: September 6, 2018
    Publication date: November 25, 2021
    Inventors: Haroon Baig, Ankit Gupta
  • Publication number: 20210357366
    Abstract: Aspects for remote analysis of file system metadata are described. In an example, a computer-readable file from a client system is received. The computer-readable file comprises file system metadata of a file system, and corresponding source location of the file system metadata on a volume of the client system. Thereafter, a target location on a target volume is identified, wherein the target location corresponds to the source location on the volume of the client system. In an example, the file system metadata is replicated onto the target location based on the computer-readable file, for analysis.
    Type: Application
    Filed: April 19, 2021
    Publication date: November 18, 2021
    Inventors: Anand Andaneppa Ganjihal, Ankit Gupta
  • Publication number: 20210349865
    Abstract: A device may receive a request to migrate source data, associated with a source platform, to a target platform. The device may select a target template associated with the target platform based on the request; obtain target information based on the target template; and generate a target mapping based on the source data and the target information. The device may analyze the target mapping to identify an unmapped element in the target mapping and determine, using a migration analysis model, a candidate mapping, for the unmapped element, between a set of the source data and a target element of the target elements. The device may provide a notification that identifies the candidate mapping, to permit a user selection associated with verifying the candidate mapping. The device may receive the user selection and migrate the source data to the target platform according to the target mapping and the user selection.
    Type: Application
    Filed: June 18, 2020
    Publication date: November 11, 2021
    Inventors: Vaibhav Mahendrabhai SHAH, Hirendra PARIHAR, Nikhil Prakash BHANDARI, Ankit GUPTA, Vikash KUMAR, Shrikant CHOUTHAMAL SARDA, Shraban NAYAK
  • Patent number: 11172326
    Abstract: A user-to-entity communication channel is established for providing increased information regarding entities to the general population. Ambassadors for a entity are identified and selected based on location history of devices for which location reporting is authorized. The ambassadors may provide information regarding the entity to the public through the communication channel. Communications between the users and ambassadors may be reported to the entity owner for analysis by the entity owner.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: November 9, 2021
    Assignee: Google LLC
    Inventors: Matteo Agosti, Ankit Gupta
  • Publication number: 20210311880
    Abstract: Aspects of a storage device including a memory and a controller are provided which allow for data associated with a deleted file to be recovered from the memory when the data is overwritten by a new file at the same logical address. To locate the data, the controller may identify a logical address associated with the data based on a directory entry associated with a FAT. The controller may determine a physical location of the data associated with the logical address based on one or more control entries in a L2P mapping table, such as a previous control entry in the table. The controller may also determine the physical location based on a hot count associated with the previous control entry. After the physical location is determined, the controller may associate a new logical address with the physical location of the data to recover the deleted file.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: Ankit Gupta, Narendhiran Chinnaanangur Ravimohan, Abhinand Amarnath