Abstract: A method for making a CMOS image sensor may include forming a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, forming a second semiconductor chip comprising image processing circuitry electrically connected to the readout circuitry, and coupling the first semiconductor chip and the second semiconductor chip together in a stack. The readout circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

Abstract: A method for making a CMOS image sensor may include forming a superlattice on a semiconductor substrate having a first conductivity type, with the superlattice including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a plurality of laterally adjacent photodiodes on the superlattice. Each photodiode may include a semiconductor layer on the superlattice and having a first conductivity type dopant and with a lower dopant concentration than the semiconductor substrate, a retrograde well extending downward into the semiconductor layer and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.

Abstract: A method for making a CMOS image sensor may include forming an active pixel sensor array including pixels, each including a photodiode and read circuitry coupled to the photodiode and including transistors defining a 4T cell arrangement. At least one of the transistors may include a first semiconductor layer and a superlattice on the first semiconductor layer including a plurality of stacked groups of layers, with each group including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The transistor(s) may also include a second semiconductor layer on the superlattice, spaced apart source and drain regions in the second semiconductor layer defining a channel therebetween, and a gate comprising a gate insulating layer on the second semiconductor layer and a gate electrode on the gate insulating layer.

Abstract: A method for making a CMOS image sensor may include forming a first semiconductor chip including an array of image sensor pixels and readout circuitry electrically connected thereto, forming a second semiconductor chip including image processing circuitry electrically connected to the readout circuitry, and coupling the first semiconductor chip and the second semiconductor chip in a stack. The processing circuitry may include a plurality of transistors each including spaced apart source and drain regions, a superlattice channel extending between the source and drain regions, and a gate including a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

Abstract: A CMOS image sensor may include a first semiconductor chip including image sensor pixels and readout circuitry electrically connected thereto, and a second semiconductor chip coupled to the first chip in a stack and including image processing circuitry electrically connected to the readout circuitry. The processing circuitry may include a plurality of transistors each including spaced apart source and drain regions and a superlattice channel extending between the source and drain regions. The superlattice channel may include a plurality of stacked groups of layers, each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. Each transistor may further include a gate insulating layer on the superlattice channel and a gate electrode on the gate insulating layer.

Abstract: A CMOS image sensor may include an active pixel sensor array including pixels, each including a photodiode and read circuitry coupled to the photodiode and including transistors defining a 4T cell arrangement. At least one of the transistors may include a first semiconductor layer and a superlattice on the first semiconductor layer including a plurality of stacked groups of layers, with each group including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The transistor(s) may also include a second semiconductor layer on the superlattice, spaced apart source and drain regions in the second semiconductor layer defining a channel therebetween, and a gate comprising a gate insulating layer on the second semiconductor layer and a gate electrode on the gate insulating layer.

Abstract: A method for making a CMOS image sensor may include forming a plurality of laterally adjacent photodiodes on a semiconductor substrate having a first conductivity types by forming a retrograde well extending downward into the substrate from a surface thereof and having a second conductivity type, forming a first well around a periphery of the retrograde well also having the second conductivity type, and forming a second well within the retrograde well having the first conductivity type. Furthermore, first and second superlattices may be respectively formed overlying each of the first and second wells, with each of the first and second superlattices comprising a plurality of stacked groups of layers, and each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

Abstract: A system and apparatus relating to a differential charge pump circuit for use in a phase-locked loop (PLL) circuit. A differential charge pump circuit can include a reference current, two sense amplifiers, a common mode control amplifier, and an h-bridge circuit. The h-bridge circuit is coupled to the reference current and the common mode control amplifier. The reference current drives a first portion of the h-bridge circuit and the common mode control amplifier controls a second portion of the h-bridge circuit. The h-bridge circuit also includes first and second nodes. The nodes are inputs to one of the sense amplifiers. The differential charge pump circuit is configured to control a voltage at the first node so that it is substantially equal to a voltage at the second node for a plurality of voltages at the second node. The differential charge pump circuit can also include a transistor with a gate coupled to an output of a sense amplifier.

Abstract: A CMOS image sensor may include a semiconductor substrate having a first conductivity type, and a superlattice on the semiconductor substrate including a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The image sensor may further include a plurality of laterally adjacent photodiodes on the superlattice. Each photodiode may include a semiconductor layer on the superlattice and having a first conductivity type dopant and with a lower dopant concentration than the semiconductor substrate, a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well within the retrograde well having the first conductivity type.

Abstract: A cognitive IoT gateway may receive real-time data associated with a user from sensor devices that are detecting user data in real-time. The real-time data is analyzed to determine whether the real-time data indicates a deviation from a predicted user behavior data predicted based on historical data. The real-time data is transformed into collated data that removes protected and sensitive information from the real-time data, and the collated data is transmitted to a server computer, wherein the protected and sensitive information received from the sensor devices remain local to the cognitive IoT gateway. Updated information computed by the server computer based on the collated data is received and a real-time alert is sent to a user device notifying the user of the updated information.

Abstract: A contact group creation method, system, and computer program product, includes identifying a subset of people in an image having a similar feature, associating each of the people in the subset of people with a contact address, and creating a contact group data file including the contact address of the each of the people in the subset of people.

Abstract: A priority seating management method, system, and computer program product, includes obtaining user trip data including a current location and a trip destination for a trip of a user, retrieving potential route data from a transportation database for each transportation vehicle traveling a route between the current location and the trip destination, retrieving real-time priority seating occupancy information for each transportation vehicle traveling the route including a location of a priority seat and an occupancy type of the priority seat, and compiling the user trip data, the potential route data, and the real-time priority seating occupancy information to determine a status availability of the priority seat for the user.

Abstract: A transmission storage oil level control system includes a first fluid reservoir and a second fluid reservoir separated from the first fluid reservoir by a barrier. A valve positioned in the barrier is controlled to open and close a fluid communication path between the second fluid reservoir and the first fluid reservoir. The valve is normally closed when a temperature of the hydraulic fluid is above a predetermined value. A sensor is positioned in at least one of the first reservoir and the second reservoir. The sensor identifies a condition of a hydraulic fluid. A control device communicates with the valve to apply a signal received from the sensor to selectively open and close the valve when the temperature of the hydraulic fluid is above the predetermined value.

Abstract: These teachings concern smart insertion of advertisements in a video, and specifically include selecting locations in a video to place such advertisements. For a specific video there is determined an integer number k of locations for advertisements when streaming the specific video to a specific user that requests the specific video. A set of advertisements is selected to deliver with the specific video, and user feedback is utilized to determine an integer number k of discrete locations within the specific video at which to place advertisements of the set. The specific video is electronically or optically delivered to the specific user, with the set of advertisements dispersed among the k discrete locations for rendering on a local display device.

Abstract: Techniques for detailed monitoring and evaluation of individual subsystems within solar photovoltaic power generation systems are provided. In one aspect, a method for monitoring a photovoltaic system having at least one array of photovoltaic panels and at least one inverter system configured to convert output from the panels from DC to AC includes the steps of: obtaining sensor data from the photovoltaic system; computing an efficiency of the panels and an efficiency of the inverter system using the sensor data; computing an aging parameter for the panels using the efficiency of the panels; computing an aging parameter for the inverter system using the efficiency of the inverter system; determining whether the aging parameter for the panels or for the inverter system exceeds a predetermined threshold level; and taking action if either the aging parameter for the array or for the inverter system exceeds the predetermined threshold level.

Abstract: There is provided a process for producing hydrocarbons from a reservoir. The process includes within the hydrocarbon reservoir, electrically heating a liquid heating fluid such that the liquid heating fluid is evaporated to produce a gaseous heating fluid, heating hydrocarbon material with the gaseous heating fluid such that the heated hydrocarbon material is mobilized and such that the gaseous heating fluid is condensed to produce a condensed heating fluid, and electrically heating at least a fraction of the condensed heating fluid such that the at least a condensed heating fluid fraction is re-evaporated, and while the evaporation, the condensing, and the re-evaporation are being effected, producing a produced fluid including at least the mobilized hydrocarbon material.

Abstract: A transmission storage oil level control system includes a first fluid reservoir and a second fluid reservoir separated from the first fluid reservoir by a barrier. A valve positioned in the barrier is controlled to open and close a fluid communication path between the second fluid reservoir and the first fluid reservoir. The valve is normally closed when a temperature of the hydraulic fluid is above a predetermined value. A sensor is positioned in at least one of the first reservoir and the second reservoir. The sensor identifies a condition of a hydraulic fluid. A control device communicates with the valve to apply a signal received from the sensor to selectively open and close the valve when the temperature of the hydraulic fluid is above the predetermined value.

Abstract: Enhanced delivery of compositions for treatment of skin tissue with photoactive plasmonic nanoparticles and light, with embodiments relating to delivery devices using, for example, ultrasound. Treatments are useful for cosmetic, diagnostic and therapeutic applications.

Abstract: These teachings concern smart insertion of advertisements in a video, and specifically include selecting locations in a video to place such advertisements. For a specific video there is determined an integer number k of locations for advertisements when streaming the specific video to a specific user that requests the specific video. A set of advertisements is selected to deliver with the specific video, and user feedback is utilized to determine an integer number k of discrete locations within the specific video at which to place advertisements of the set. The specific video is electronically or optically delivered to the specific user, with the set of advertisements dispersed among the k discrete locations for rendering on a local display device.

Abstract: A method and apparatus to provide hop-by-hop tracking for a communication network is described. In one embodiment, each router verifies that a next downstream router supports tracking and in response, adds a tracking indicator and a timestamp to the data packet. An end router provides a compilation of all the timestamps back to the originating router.