Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.

Abstract: An embodiment of the present invention is a technique to distribute clock. At least a metal layer is formed to have a standing-wave structure to distribute a clock signal to receiver end points from a clock source such that the receiver end points are substantially electrically equivalent with respect to the clock source. The metal layer is embedded in dielectric layers made of thick film using a wafer-level thick film (WLTF) process.

Abstract: A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The one or more integrated thick metal layers may improve power delivery and reduce mechanical stress to a die at a die/package interface.

Abstract: A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The process flow may include forming an inter-layer dielectric with spray coating or lamination over a surface with high aspect ratio structures.

Abstract: In one embodiment there is provided a method comprising performing a sawing operation on a wafer; and treating the wafer to at least reduce a propagation of micro-cracks formed in the wafer during the sawing. In another embodiment there is provided a semi-conductor die comprising a substrate having a central first portion, and a peripheral second portion around the central first portion; an integrated circuit formed on the central first portion; and a guard ring disposed between the first and second portions of the substrate to prevent a propagation of cracks found in that second portion to the first portion, wherein the second portion includes micro-cracks filled with a crack-healing material to arrest propagation of the micro-cracks beyond the guard ring and into the central first portion.

Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.

Abstract: According to one embodiment, a system is disclosed. The system includes a first integrated circuit (IC), an input/output (I/O) signal routing layer mounted below the first IC and a second IC mounted on the routing layer.

Abstract: Dual damascene methods of fabricating conducting lines and vias in organic intermetal dielectric layers utilize sacrificial inorganic dielectrics. In one embodiment, a via opening formed in organic intermetal dielectric layers is filled with sacrificial inorganic dielectric. A line opening is formed aligned with the via opening. The sacrificial inorganic dielectric is selectively removed. The via and line openings are filled with conducting material. In a second embodiment, a line opening formed in organic intermetal dielectric layers is filled with sacrificial inorganic dielectric. A via opening is formed aligned with the line opening. The sacrificial inorganic dielectric is selectively removed. The via and line openings are filled with conducting material. The sacrificial inorganic dielectrics protect the organic intermetal dielectric layers, preserving critical dimensions and facilitating photoresist rework.

Abstract: A strategy for inducing immune T lymphocytes to respond in such a fashion to their target antigen at first exposure so as to enable them to mount a response of greater magnitude upon any subsequent exposure to the same target is provided. The strategy involves exposure of T cells or animals being immunized to the commonly used phosphodiesterase inhibitor drug, pentoxifylline (POX/PF/Trental), during immune priming. Evidence is provided showing that such exposure leads to enhancement of immune T cells responses upon re-exposure. The strategy is relevant and useful for increasing the efficiency of vaccinations.