Abstract: Metrology methods and targets are provided for reducing or eliminating a difference between a device pattern position and a target pattern position while maintaining target printability, process compatibility and optical contrast—in both imaging and scatterometry metrology. Pattern placement discrepancies may be reduced by using sub-resolved assist features in the mask design which have a same periodicity (fine pitch) as the periodic structure and/or by calibrating the measurement results using PPE (pattern placement error) correction factors derived by applying learning procedures to specific calibration terms, in measurements and/or simulations. Metrology targets are disclosed with multiple periodic structures at the same layer (in addition to regular target structures), e.g., in one or two layers, which are used to calibrate and remove PPE, especially when related to asymmetric effects such as scanner aberrations, off-axis illumination and other error sources.

Abstract: A data-driven misregistration parameter configuration and measurement system and method including simulating a plurality of measurement simulations of at least one multilayered semiconductor device, selected from a batch of multilayered semiconductor devices intended to be identical, using sets of measurement parameter configurations, generating simulation data for the device, identifying recommended measurement parameter configurations, selected from sets of measurement parameter configurations, providing a multilayered semiconductor device selected from the batch, providing the at least one recommended set of measurement parameter configurations to a misregistration metrology tool having multiple possible sets of measurement parameter configurations, measuring at least one multilayered semiconductor device, selected from the batch using the recommended set, thereby generating measurement data for the device, thereafter identifying a final recommended set of measurement parameter configurations and measuring

Abstract: A dynamic misregistration measurement amelioration method including taking at least one misregistration measurement at multiple sites on a first semiconductor device wafer, which is selected from a batch of semiconductor device wafers intended to be identical, analyzing each of the misregistration measurements, using data from the analysis of each of the misregistration measurements to determine ameliorated misregistration measurement parameters at each one of the multiple sites, thereafter ameliorating misregistration metrology tool setup for ameliorated misregistration measurement at the each one of the multiple sites, thereby generating an ameliorated misregistration metrology tool setup and thereafter measuring misregistration at multiple sites on a second semiconductor device wafer, which is selected from the batch of semiconductor device wafers intended to be identical, using the ameliorated misregistration metrology tool setup.

Abstract: Metrology methods and targets are provided for reducing or eliminating a difference between a device pattern position and a target pattern position while maintaining target printability, process compatibility and optical contrast—in both imaging and scatterometry metrology. Pattern placement discrepancies may be reduced by using sub-resolved assist features in the mask design which have a same periodicity (fine pitch) as the periodic structure and/or by calibrating the measurement results using PPE (pattern placement error) correction factors derived by applying learning procedures to specific calibration terms, in measurements and/or simulations. Metrology targets are disclosed with multiple periodic structures at the same layer (in addition to regular target structures), e.g., in one or two layers, which are used to calibrate and remove PPE, especially when related to asymmetric effects such as scanner aberrations, off-axis illumination and other error sources.